Re: [PATCH v1] perf vendor events intel: Add umasks to PCU events.

[Arnaldo Carvalho de Melo]

On Wed, Feb 28, 2024 at 08:12:10AM -0800, Ian Rogers wrote:
> On Wed, Feb 28, 2024 at 6:55 AM Liang, Kan <kan.liang@xxxxxxxxxxxxxxx> wrote:
> > On 2024-02-27 9:12 p.m., Ian Rogers wrote:
> > > Kan, what's the right way to deal with this?
> >
> > There is no umask in the uncore spec. Please see P120 of the spec.
> > https://www.intel.com/content/www/us/en/develop/download/intel-xeon-processor-e5-2600-v2-product-family-uncore-performance-monitoring-reference.html
> >
> > It should be occ_sel.
> > The occ_sel = (the umask from the event list >> 6) & 0x3.
> >
> > I don't think we want to change either the kernel or the perf tool.
> > There is nothing to help either if we add the occ_sel in the original
> > event list. So it seems the only choice should be handling it in the
> > convertor tool.
> >
> > Is it possible to check the UNC_P_POWER_STATE_OCCUPANCY.CORES_C0 in IVT
> > and use "Filter": "occ_sel=0x1" to replace "UMask": "0x40"?
> >
> > It seems everything in the filter will directly be appended. Is my
> > understanding correct?
> 
> Yep. From the manual:
> C0 = 1
> C3 = 2
> C6= 3
> So I'll need to fix all 3 events during the conversion to perf json.
> The same problem exists for haswell and broadwell, so I'll do the fix
> on those architectures too. I was able to test on a jaketown but the
> kernel source makes me think the same fix is necessary there too. I'll
> send out a new patch with this.

Please clarify if this remains reviewed and should be merged as-is.

- Arnaldo