[PATCH v4 5/6] dt-bindindgs: clock: nxp: support i.MX95 Display CSR module

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@xxxxxxx>

The DISPLAY_CSR provides control and status of the following:
 Clock selection for the Display Engines
 Pixel Interleaver mode selection
 Pixel Link enables
 QoS settings for the display controller
 ArCache and AwCache signals
 Display Engine plane association

This patch is to add the clock features for this module

Signed-off-by: Peng Fan <peng.fan@xxxxxxx>
---
 .../bindings/clock/nxp,imx95-display-csr.yaml      | 50 ++++++++++++++++++++++
 include/dt-bindings/clock/nxp,imx95-clock.h        |  4 ++
 2 files changed, 54 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-display-csr.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-display-csr.yaml
new file mode 100644
index 000000000000..9a5e21346b0d
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/nxp,imx95-display-csr.yaml
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/nxp,imx95-display-csr.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX95 Display Block Control
+
+maintainers:
+  - Peng Fan <peng.fan@xxxxxxx>
+
+properties:
+  compatible:
+    items:
+      - const: nxp,imx95-display-csr
+      - const: syscon
+
+  reg:
+    maxItems: 1
+
+  power-domains:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  '#clock-cells':
+    const: 1
+    description:
+      The clock consumer should specify the desired clock by having the clock
+      ID in its "clocks" phandle cell. See
+      include/dt-bindings/clock/nxp,imx95-clock.h
+
+required:
+  - compatible
+  - reg
+  - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    syscon@4c410000 {
+      compatible = "nxp,imx95-display-csr", "syscon";
+      reg = <0x4b010000 0x10000>;
+      #clock-cells = <1>;
+      clocks = <&scmi_clk 75>;
+      power-domains = <&scmi_devpd 13>;
+    };
+...
diff --git a/include/dt-bindings/clock/nxp,imx95-clock.h b/include/dt-bindings/clock/nxp,imx95-clock.h
index e642a54c81a0..83fa3ffe78a8 100644
--- a/include/dt-bindings/clock/nxp,imx95-clock.h
+++ b/include/dt-bindings/clock/nxp,imx95-clock.h
@@ -25,4 +25,8 @@
 #define IMX95_CLK_DISPMIX_PIX_DI1_GATE		4
 #define IMX95_CLK_DISPMIX_LVDS_CSR_END		5
 
+#define IMX95_CLK_DISPMIX_ENG0_SEL	0
+#define IMX95_CLK_DISPMIX_ENG1_SEL	1
+#define IMX95_CLK_DISPMIX_END		2
+
 #endif	/* __DT_BINDINGS_CLOCK_IMX95_H */

-- 
2.37.1