[PATCH 0/2] KVM: x86/pmu: Globally enable GP counters at "RESET"

[Sean Christopherson]

Globally enable GP counters in PERF_GLOBAL_CTRL when refreshing a vCPU's
PMU to emulate the architecturally defined post-RESET behavior of the MSR.

Extend pmu_counters_test.c to verify the behavior.

Note, this is slightly different than what I "posted" before: it keeps
PERF_GLOBAL_CTRL '0' if there are no counters.  That's technically not
what the SDM dictates, but I went with the common sense route of
interpreting the SDM to mean "globally enable all GP counters".

I figured it was much more likely that the SDM writers didn't think
about virtual CPUs that can have a PMU without any GP counters, versus
Intel really wanting to set _all_ bits in PERF_GLOBAL_CTRL :-)

Sean Christopherson (2):
  KVM: x86/pmu: Set enable bits for GP counters in PERF_GLOBAL_CTRL at
    "RESET"
  KVM: selftests: Verify post-RESET value of PERF_GLOBAL_CTRL in PMCs
    test

 arch/x86/kvm/pmu.c                            | 16 +++++++++++++--
 .../selftests/kvm/x86_64/pmu_counters_test.c  | 20 ++++++++++++++++++-
 2 files changed, 33 insertions(+), 3 deletions(-)


base-commit: 964d0c614c7f71917305a5afdca9178fe8231434
-- 
2.44.0.278.ge034bb2e1d-goog