Re: [PATCH] Documentation: tpm_tis

From: Jarkko Sakkinen
Date: Mon Mar 04 2024 - 20:52:53 EST


On Tue Mar 5, 2024 at 12:53 AM EET, Randy Dunlap wrote:
>
>
> On 3/4/24 13:27, Jarkko Sakkinen wrote:
> > Based recent discussions on LKML, provide preliminary bits of tpm_tis_core
> > dependent drivers. Includes only bare essentials but can be extended later
> > on case by case. This way some people may even want to read it later on.
> >
> > Cc: Jonathan Corbet <corbet@xxxxxxx>
> > CC: Daniel P. Smith <dpsmith@xxxxxxxxxxxxxxxxxxxx>
> > Cc: Lino Sanfilippo <l.sanfilippo@xxxxxxxxxx>
> > Cc: Jason Gunthorpe <jgg@xxxxxxxx>
> > Cc: Peter Huewe <peterhuewe@xxxxxx>
> > Cc: James Bottomley <James.Bottomley@xxxxxxxxxxxxxxxxxxxxx>
> > Cc: Alexander Steffen <Alexander.Steffen@xxxxxxxxxxxx>
> > Cc: keyrings@xxxxxxxxxxxxxxx
> > Cc: linux-doc@xxxxxxxxxxxxxxx
> > Cc: linux-kernel@xxxxxxxxxxxxxxx
> > Cc: linux-integrity@xxxxxxxxxxxxxxx
> > Signed-off-by: Jarkko Sakkinen <jarkko@xxxxxxxxxx>
> > ---
> > Documentation/security/tpm/index.rst | 1 +
> > Documentation/security/tpm/tpm_tis.rst | 30 ++++++++++++++++++++++++++
> > 2 files changed, 31 insertions(+)
> > create mode 100644 Documentation/security/tpm/tpm_tis.rst
> >
>
> > diff --git a/Documentation/security/tpm/tpm_tis.rst b/Documentation/security/tpm/tpm_tis.rst
> > new file mode 100644
> > index 000000000000..3cec0216a169
> > --- /dev/null
> > +++ b/Documentation/security/tpm/tpm_tis.rst
> > @@ -0,0 +1,30 @@
> > +.. SPDX-License-Identifier: GPL-2.0
> > +
> > +=========================
> > +TPM FIFO interface Driver
> > +=========================
> > +
> > +FIFO (First-In-First-Out) is the name of the hardware interface used by the
> > +`tpm_tis_core` dependent drivers. The prefix "tis" is named after TPM
> > +Interface Specification, which is the hardware interface specification for
> > +TPM 1.x chips.
> > +
> > +Communication is based on a 5 KiB buffer shared by the TPM chip through a
> > +hardware bus or memory map. The buffer is further split to five equal size
> > +buffers, which provide equivalent sets of registers for communication
> > +between CPU and TPM. The communication end points are called *localities*
> > +in the TCG terminology.
> > +
> > +When a kernel wants to send a commands to the TPM chip, it first reserves
> > +locality 0 by setting `requestUse` bit in `TPM_ACCESS` register. The bit is
> > +cleared by the chip when the access is granted. Once completed its
> > +communication, it sets `activeLocity` bit in the same register.
>
> Is that activeLocality ?

Yes.

>
> > +
> > +Pending localities are served in order by the chip descending orderm and
> > +one at a time:
> > +
> > +- Locality 0 has the lowest priority.
> > +- Locality 5 has the highest priotiy.
>
> priority.
>
> > +
> > +Further information on purpose and meaning of the localities can be found
> > +from section 3.2 of TCG PC Client Platform TPM Profile Specification.

Thanks for the remarks. Too many typos but at least I think the story is
is understandable and describes pretty well key elements of tpm_tis_core.

BR, Jarkko