Re: [PATCH net-next v2 3/4] net: macb: Enable queue disable and WOL

[Vineeth Karumanchi]

Hi Andrew,

On 23/02/24 1:04 am, Andrew Lunn wrote:
> On Thu, Feb 22, 2024 at 09:08:47PM +0530, Vineeth Karumanchi wrote:
> > - Enable WOL for ZynqMP devices.
> > - Enable queue disable and WOL for Versal devices.
> >
> > Signed-off-by: Vineeth Karumanchi <vineeth.karumanchi@xxxxxxx>
> > ---
> >   drivers/net/ethernet/cadence/macb_main.c | 6 ++++--
> >   1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
> > index 62d796ef4035..55d8c1f3ee80 100644
> > --- a/drivers/net/ethernet/cadence/macb_main.c
> > +++ b/drivers/net/ethernet/cadence/macb_main.c
> > @@ -4903,7 +4903,7 @@ static const struct macb_config np4_config = {
> >   
> >   static const struct macb_config zynqmp_config = {
> >   	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE |
> > -		MACB_CAPS_JUMBO |
> > +		MACB_CAPS_JUMBO | MACB_CAPS_WOL |
> >   		MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH,
> >   	.dma_burst_length = 16,
> >   	.clk_init = macb_clk_init,
> > @@ -4954,7 +4954,9 @@ static const struct macb_config sama7g5_emac_config = {
> >   
> >   static const struct macb_config versal_config = {
> >   	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO |
> > -		MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH | MACB_CAPS_NEED_TSUCLK,
> > +		MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH |
> > +		MACB_CAPS_QUEUE_DISABLE | MACB_CAPS_NEED_TSUCLK |
> > +		MACB_CAPS_WOL,
>
> So WoL is a proprietary extension only available in AMD versions of
> the MACB?

It is not specific to AMD versions. All Cadence GEM IP versions have the 
capability, but specific vendors might enable or disable it as per their 
requirements.

WOL was previously enabled via the device-tree attribute. Some users 
might not leverage it.

However, we can add MACB_CAPS_WOL to "default_gem_config", but we don't 
know which devices have WOL support.

Please let me know your suggestions.

Vineeth
>      Andrew