Re: [PATCH 02/33] clk: ast2600: Add FSI parent clock with correct rate
From: Stephen Boyd
Date: Thu Feb 22 2024 - 00:46:41 EST
Quoting Eddie James (2024-02-15 14:07:28)
> In order to calculate correct FSI bus clocks, the FSI clock must
> correctly calculate the rate from the parent (APLL / 4).
>
> Signed-off-by: Eddie James <eajames@xxxxxxxxxxxxx>
> ---
Applied to clk-next