Re: [PATCH RFC 4/4] dt-binding: clock: hisilicon,clock-reset-controller: add Hi3798MV200 SoC support

From: Rob Herring
Date: Sun Feb 18 2024 - 15:57:54 EST


On Fri, Feb 16, 2024 at 07:37:54PM +0800, Yang Xiwen wrote:
> This SoC is similar to Hi3798CV200.
>
> Also document the specific DLL regs and add an example for it.
>
> Signed-off-by: Yang Xiwen <forbidden405@xxxxxxxxxxx>
> ---
> .../clock/hisilicon,clock-reset-generator.yaml | 36 ++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/hisilicon,clock-reset-generator.yaml b/Documentation/devicetree/bindings/clock/hisilicon,clock-reset-generator.yaml
> index d37cd892473e..8ee844574eda 100644
> --- a/Documentation/devicetree/bindings/clock/hisilicon,clock-reset-generator.yaml
> +++ b/Documentation/devicetree/bindings/clock/hisilicon,clock-reset-generator.yaml
> @@ -44,12 +44,17 @@ properties:
> - hisilicon,hi3519-crg
> - hisilicon,hi3798cv200-crg
> - hisilicon,hi3798cv200-sysctrl
> + - hisilicon,hi3798mv200-crg
> + - hisilicon,hi3798mv200-sysctrl
> - const: syscon
> - const: simple-mfd
>
> reg:
> maxItems: 1
>
> + ranges:
> + maxItems: 1
> +
> '#clock-cells':
> const: 1
>
> @@ -87,6 +92,12 @@ properties:
> description: |
> Reset controller for Hi3798CV200 GMAC module
>
> +patternProperties:
> + '.*-dll@[0-9a-f]+':
> + type: object
> + description: |
> + eMMC/SD delay-locked-loop (DLL) register subnode
> +
> required:
> - compatible
> - '#clock-cells'
> @@ -137,3 +148,28 @@ examples:
> #clock-cells = <1>;
> };
> };
> + - |
> + crg: clock-reset-controller@8a22000 {
> + compatible = "hisilicon,hi3798mv200-crg", "syscon", "simple-mfd";
> + reg = <0x8a22000 0x1000>;
> + ranges = <0x0 0x8a22000 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + #clock-cells = <1>;
> + #reset-cells = <2>;
> +
> + emmc_sap_dll: sap-dll@39c {
> + compatible = "hisilicon,sdmmc-sap-dll", "syscon", "simple-mfd";

No child nodes, not a simple-mfd.

> + reg = <0x39c 0x8>;

I imagine you are linking to this node from the SD host controller node
with some custom property. Instead of defining the register address
here, link to the parent node (&crg) instead and make the offset the 2nd
cell.

> + };
> +
> + sdio0_sap_dll: sap-dll@3a4 {
> + compatible = "hisilicon,sdmmc-sap-dll", "syscon", "simple-mfd";
> + reg = <0x3a4 0x8>;
> + };
> +
> + sdio1_sap_dll: sap-dll@3ac {
> + compatible = "hisilicon,sdmmc-sap-dll", "syscon", "simple-mfd";
> + reg = <0x3ac 0x8>;
> + };
> + };
>
> --
> 2.43.0
>