Re: [PATCH v1 1/6] dt-bindings: cache: Document the sifive,perfmon-counters property

From: Krzysztof Kozlowski
Date: Sat Feb 17 2024 - 04:01:02 EST


On 16/02/2024 01:08, Samuel Holland wrote:
> The SiFive Composable Cache controller contains an optional PMU with a
> configurable number of event counters. Document a property which

Configurable in what context? By chip designers or by OS? Why this
cannot be deduced from the compatible?

> describes the number of available counters.
>
> Signed-off-by: Samuel Holland <samuel.holland@xxxxxxxxxx>
> ---
>
> Documentation/devicetree/bindings/cache/sifive,ccache0.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>

Best regards,
Krzysztof