Because the MAC can also support external PHY according to the datasheet. Maybe some other SoCs didn't implement this internal PHY and used an external PHY instead.+ // Register the optional MDIO busI don't understand the architecture of this device yet...
+ for_each_available_child_of_node(node, mdio_np) {
+ if (of_node_name_prefix(mdio_np, "mdio")) {
+ priv->mdio_pdev = of_platform_device_create(mdio_np, NULL, dev);
+ of_node_put(mdio_np);
+ if (!priv->mdio_pdev) {
+ dev_err(dev, "failed to register MDIO bus device\n");
+ goto out_free_netdev;
+ }
+ mdio_registered = true;
+ break;
+ }
+ }
+
+ if (!mdio_registered)
+ dev_warn(dev, "MDIO subnode notfound. This is usually a bug.\n");
It seems like you have an integrated PHY? In the example, you used a
phy-handle to bind the MAC to the PHY. So why is the MDIO bus
optional?
No. MII signals is not accessible outside of the SoC. The SoC only exports FEPHY pins (i.e. RXN(P) and TXN(P)).
Do the MII signals from the MAC also go to SoC pins, so you could use
an external PHY? Is there a SERDES so you could connect to an SFP
cage?
It can, but not for Hi3798MV200. The datasheet said it can use both internal phy or external phy. But for Hi3798MV200, seems impossible.
Also, do the MDIO pins go to SoC pins? Can the MDIO bus master be used
to control external PHYs?
If everything is internal, fixed in silicon, no variation possible,
you don't need to describe the MDIO bus in DT. The MAC driver can
register it, and then get the PHY at the hard coded address it uses.
Andrew