Re: [PATCH 4/6] dt-bindings: net: add hisilicon-femac

From: Yang Xiwen
Date: Thu Feb 15 2024 - 19:21:18 EST


On 2/16/2024 8:06 AM, Andrew Lunn wrote:
+ clocks:
+ minItems: 3
+ maxItems: 3
+
+ clock-names:
+ items:
+ - const: mac
+ - const: macif
+ - const: phy
The C code has:

+enum clk_type {
+ CLK_MAC,
+ CLK_BUS,
+ CLK_PHY,
+ CLK_NUM,
+};

Could you explain BUS vs macif?
To be honest, I don't know. "macif" is used by hisi-gmac driver, but in the TRM it's called "bus". So I guess it's just an alias? As you mentioned, I'll stick to macif everywhere, to keep sync with hisi-gmac driver.

Also, what exactly is the PHY clock?
As the name suggests, it's not part of the mac controller actually, rather it's the clock of the internal PHY. The SoC (or the PHY/MAC, I don't know exactly which) is quirky that it is mandatory to disable PHY CLK before MAC reset or else the PHY won't work(see hisi_femac_phy_reset()). I can't find a better solution. Letting the ethernet controller manage all clocks and resets seems the easiest way to handle this quirk.

Andrew


--
Regards,
Yang Xiwen