Re: [PATCH v2 2/2] phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver

[Cristian Ciocaltea]

Hi Luis,

On 2/12/24 18:44, Luis de Arquer wrote:
> Hi Cristian,
> 
> On Mon, 2024-02-05 at 13:24 +0200, Cristian Ciocaltea wrote:
>> +
>> +static bool hdptx_phy_clk_pll_calc(unsigned int data_rate,
>> +				   struct ropll_config *cfg)
>> +{
>> +	const unsigned int fout = data_rate / 2, fref = 24000;
>> +	unsigned long k = 0, lc, k_sub, lc_sub;
>> +	unsigned int fvco, sdc;
>> +	u32 mdiv, sdiv, n = 8;
>> +
>> +	for (sdiv = 16; sdiv >= 1; sdiv--) {
>> +		if (sdiv % 2 && sdiv != 1)
>> +			continue;
>> +
>> +		fvco = fout * sdiv;
>> +
>> +		if (fvco < 2000000 || fvco > 4000000)
>> +			continue;
>> +
> 
> What about adding a check to data_rate, maybe like
> 
> if (fout > 0x0FFFFFFF)
> 	return false;
> 
> or similar, before the for loop, to keep the multiplication safe?
> 
> Right now it would be redundant, given that data_rate was, at some
> point, encoded in 28 bits within bus_width. But can prevent future pain,
> especially after changing to phy_configure_opts_hdmi.

Indeed, it makes sense to do the check, thanks for the heads up!
I was almost ready to submit v3, so this arrived just in time. :-)

Regards,
Cristian