Re: [PATCH] arm64: dts: qcom: qcs6490-rb3gen2: Declare GCC clocks protected

[Bjorn Andersson]

On Fri, Feb 09, 2024 at 05:47:35PM +0100, Luca Weiss wrote:
> On Fri Feb 9, 2024 at 5:21 PM CET, Bjorn Andersson wrote:
> > The SC7180 GCC binding describes clocks which, due to the difference in
> 
> SC7180 -> SC7280?
> 

Indeed, got lost in the number soup.

> With that fixed:
> 
> Reviewed-by: Luca Weiss <luca.weiss@xxxxxxxxxxxxx>
> 
> > security model, are not accessible on the RB3gen2 - in the same way seen
> > on QCM6490.
> >
> > Mark these clocks as protected, to allow the board to boot.
> 
> So the board never was able to boot before this patch?
> 

Correct.

With this and the correction of the voltage ranges for vph_pwr, the
board is now booting with only some minor errors in the log...

Regards,
Bjorn

> >
> > Signed-off-by: Bjorn Andersson <quic_bjorande@xxxxxxxxxxx>
> > ---
> > I did notice Taniya's patch [1] after writing this patch. I'd prefer to
> > merge this minimal set asap, to make the board boot, unless there's a
> > strong argument for including those other clocks in the protected list.
> >
> > [1] https://lore.kernel.org/linux-arm-msm/20240208062836.19767-6-quic_tdas@xxxxxxxxxxx/
> > ---
> >  arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 18 ++++++++++++++++++
> >  1 file changed, 18 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> > index 8bb7d13d85f6..97b1586f9f19 100644
> > --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> > +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> > @@ -413,6 +413,24 @@ vreg_bob_3p296: bob {
> >  	};
> >  };
> >  
> > +&gcc {
> > +	protected-clocks = <GCC_CFG_NOC_LPASS_CLK>,
> > +			   <GCC_EDP_CLKREF_EN>,
> > +			   <GCC_MSS_CFG_AHB_CLK>,
> > +			   <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>,
> > +			   <GCC_MSS_OFFLINE_AXI_CLK>,
> > +			   <GCC_MSS_Q6SS_BOOT_CLK_SRC>,
> > +			   <GCC_MSS_Q6_MEMNOC_AXI_CLK>,
> > +			   <GCC_MSS_SNOC_AXI_CLK>,
> > +			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
> > +			   <GCC_QSPI_CORE_CLK>,
> > +			   <GCC_QSPI_CORE_CLK_SRC>,
> > +			   <GCC_SEC_CTRL_CLK_SRC>,
> > +			   <GCC_WPSS_AHB_BDG_MST_CLK>,
> > +			   <GCC_WPSS_AHB_CLK>,
> > +			   <GCC_WPSS_RSCP_CLK>;
> > +};
> > +
> >  &qupv3_id_0 {
> >  	status = "okay";
> >  };
> >
> > ---
> > base-commit: b1d3a0e70c3881d2f8cf6692ccf7c2a4fb2d030d
> > change-id: 20240209-qcm6490-gcc-protected-clocks-ee5fafdb76b3
> >
> > Best regards,
>