Re: [PATCH v2 1/2] PCI: Disable D3cold on Asus B1400 PCI-NVMe bridge

From: David E. Box
Date: Fri Feb 09 2024 - 12:20:03 EST

On Fri, 2024-02-09 at 09:36 +0100, Daniel Drake wrote:
> On Thu, Feb 8, 2024 at 5:57 PM David E. Box <>
> wrote:
> > This does look like a firmware bug. We've had reports of D3cold support
> > missing
> > when running in non-VMD mode on systems that were designed with VMD for
> > Windows.
> > These issues have been caught and addressed by OEMs during enabling of Linux
> > systems. Does D3cold work in VMD mode?
> On Windows for the VMD=on case, we only tested this on a BIOS with
> StorageD3Enable=0. The NVMe device and parent bridge stayed in D0 over
> suspend, but that's exactly what the BIOS asked for, so it doesn't
> really answer your question.
> On Linux with VMD=on and StorageD3Enable=1, the NVMe storage device
> and the VMD parent bridge are staying in D0 over suspend. I don't know
> why this is, I would have expected at least D3hot.

Yeah something is missing here. When StorageD3Enable is set, the nvme driver
prints the following message during boot:

"platform quirk: setting simple suspend"

If you don't see this, then the driver never saw StorageD3Enable=1. Possible
reasons are:

- The property doesn't exist
- The property isn't set under the ACPI companion device
- There is no associated ACPI companion device
- The "nvme=noacpi" parameter was passed on the kernel cmdline
- The nvme driver was quirked to not use D3 with

How was the D-state status confirmed? You can use the following to see the D
state of PCI devices during suspend in the kernel log:

echo -n "file pci-driver.c +p" > /sys/kernel/debug/dynamic_debug/control


>   However, given
> that the NVMe device has no firmware_node under the VMD=on setup, I
> believe there is no way it would enter D3cold because there's no
> linkage to an ACPI device, so no available _PS3 or _PR0 or whatever is
> the precise definition of D3cold.
> I also realise I may have made a bad assumption in my previous mail
> when looking at the Dell device: I was assuming that a parent PCI
> bridge cannot go into D3cold if its child devices only got as far as
> D3hot, but I now realise I'm not sure if that constraint actually
> exists.
> Not sure if these questions are relevant for the consideration of this
> patch, but I'll try to find some time to answer them next week.
> Daniel