Re: [PATCH v2 2/2] net: phy: dp83826: support TX data voltage tuning

From: Andrew Lunn
Date: Thu Feb 08 2024 - 11:51:10 EST

> Now, I understand your question 🙂
> To answer, DP83826_CFG_DAC_MINUS_DEFAULT will indeed leave the register
> unchanged. However, dp83822 driver exports a PHY callback soft_reset
> which does a SW reset which actually has the same effect as the HW reset
> pin according to the datasheet. Since the PAL enforces the call to
> soft_reset before config_init, in dp83826_config_init we can rely on the
> registers reset value.

Great. Please add a version of this to the commit message. That shows
we did our due diligence and we don't expect any surprises in the


pw-bot: cr