Re: [PATCH v2 2/2] net: phy: dp83826: support TX data voltage tuning

[POPESCU Catalin]

On 07.02.24 19:35, Andrew Lunn wrote:
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>> +static int dp83826_config_init(struct phy_device *phydev)
>> +{
>> +     struct dp83822_private *dp83822 = phydev->priv;
>> +     u16 val, mask;
>> +     int ret;
>> +
>> +     if (dp83822->cfg_dac_minus != DP83826_CFG_DAC_MINUS_DEFAULT) {
>> +             val = FIELD_PREP(DP83826_VOD_CFG1_MINUS_MDI_MASK, dp83822->cfg_dac_minus) |
>> +                   FIELD_PREP(DP83826_VOD_CFG1_MINUS_MDIX_MASK,
>> +                              FIELD_GET(DP83826_CFG_DAC_MINUS_MDIX_5_TO_4,
>> +                                        dp83822->cfg_dac_minus));
>> +             mask = DP83826_VOD_CFG1_MINUS_MDIX_MASK | DP83826_VOD_CFG1_MINUS_MDI_MASK;
>> +             ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83826_VOD_CFG1, mask, val);
>> +             if (ret)
>> +                     return ret;
>> +
>> +             val = FIELD_PREP(DP83826_VOD_CFG2_MINUS_MDIX_MASK,
>> +                              FIELD_GET(DP83826_CFG_DAC_MINUS_MDIX_3_TO_0,
>> +                                        dp83822->cfg_dac_minus));
>> +             mask = DP83826_VOD_CFG2_MINUS_MDIX_MASK;
>> +             ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83826_VOD_CFG2, mask, val);
>> +             if (ret)
>> +                     return ret;
>> +     }
> I could be reading this wrong, but it looks like
> DP83826_CFG_DAC_MINUS_DEFAULT actually means leave the value
> unchanged? Is there anything guaranteeing it does in fact have the
> default value in the hardware?
>
>          Andrew

Yes, the datasheet clearly states the default/reset values of both 
registers VOD_CFG1 & VOD_CFG2 which are :
- cfg_dac_minus : 30h
- cfg_dac_plus : 10h