Re: [PATCH 4/4] arm64: dts: rockchip: Add OPP data for CPU cores on RK3588

From: Daniel Lezcano
Date: Fri Jan 26 2024 - 07:56:59 EST


On 26/01/2024 08:49, Dragan Simic wrote:
On 2024-01-26 08:30, Alexey Charkov wrote:
On Fri, Jan 26, 2024 at 11:05 AM Dragan Simic <dsimic@xxxxxxxxxxx> wrote:
On 2024-01-26 07:44, Alexey Charkov wrote:
> On Fri, Jan 26, 2024 at 10:32 AM Dragan Simic <dsimic@xxxxxxxxxxx>
> wrote:
>> On 2024-01-25 10:30, Daniel Lezcano wrote:
>> > On 24/01/2024 21:30, Alexey Charkov wrote:
>> >> By default the CPUs on RK3588 start up in a conservative performance
>> >> mode. Add frequency and voltage mappings to the device tree to enable

[ ... ]

Throttling would also lower the voltage at some point, which cools it
down much faster!

Of course, but the key is not to cool (and slow down) the CPU cores too
much, but just enough to stay within the available thermal envelope,
which is where the same-voltage, lower-frequency OPPs should shine.

That implies the resulting power is sustainable which I doubt it is the case.

The voltage scaling makes the cooling effect efficient not the frequency.

For example:
opp5 = opp(2GHz, 1V) => 2 BogoWatt
opp4 = opp(1.9GHz, 1V) => 1.9 BogoWatt
opp3 = opp(1.8GHz, 0.9V) => 1.458 BogoWatt
[ other states but we focus on these 3 ]

opp5->opp4 => -5% compute capacity, -5% power, ratio=1
opp4->opp3 => -5% compute capacity, -23.1% power, ratio=21,6

opp5->opp3 => -10% compute capacity, -27.1% power, ratio=36.9

In burst operation (no thermal throttling), opp4 is pointless we agree on that.

IMO the following will happen: in burst operation with thermal throttling we hit the trip point and then the step wise governor reduces opp5 -> opp4. We have slight power reduction but the temperature does not decrease, so at the next iteration, it is throttle at opp3. And at the end we have opp4 <-> opp3 back and forth instead of opp5 <-> opp3.

It is probable we end up with an equivalent frequency average (or compute capacity avg).

opp4 <-> opp3 (longer duration in states, less transitions)
opp5 <-> opp3 (shorter duration in states, more transitions)

Some platforms had their higher OPPs with the same voltage and they failed to cool down the CPU in the long run.

Anyway, there is only one way to check it out :)

Alexey, is it possible to compare the compute duration for 'dhrystone' with these voltage OPP and without ? (with a period of cool down between the test in order to start at the same thermal condition) ?



When the CPU load isn't bursty but steady and high, we don't race to
idle, but run a marathon instead, so to speak. :)

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