RE: [PATCH] clocksource: timer-riscv: Clear timer interrupt on timer initialization

From: Leyfoon Tan
Date: Thu Jan 25 2024 - 12:11:30 EST




> -----Original Message-----
> From: Anup Patel <apatel@xxxxxxxxxxxxxxxx>
> Sent: Friday, January 26, 2024 1:00 AM
> To: Leyfoon Tan <leyfoon.tan@xxxxxxxxxxxxxxxx>
> Cc: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx>; Thomas Gleixner
> <tglx@xxxxxxxxxxxxx>; Palmer Dabbelt <palmer@xxxxxxxxxxx>; Paul Walmsley
> <paul.walmsley@xxxxxxxxxx>; Albert Ou <aou@xxxxxxxxxxxxxxxxx>;
> atishp@xxxxxxxxxxxx; linux-riscv@xxxxxxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx; Ley Foon Tan <lftan.linux@xxxxxxxxx>
> Subject: Re: [PATCH] clocksource: timer-riscv: Clear timer interrupt on timer
> initialization
>
> On Thu, Jan 25, 2024 at 10:25 PM Ley Foon Tan
> <leyfoon.tan@xxxxxxxxxxxxxxxx> wrote:
> >
> > In the RISC-V specification, the stimecmp register doesn't have a
> > default value. To prevent the timer interrupt from being triggered
> > during timer initialization, clear the timer interrupt by writing
> > stimecmp with a maximum value.
> >
> > Signed-off-by: Ley Foon Tan <leyfoon.tan@xxxxxxxxxxxxxxxx>
> > ---
> > drivers/clocksource/timer-riscv.c | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/clocksource/timer-riscv.c
> > b/drivers/clocksource/timer-riscv.c
> > index e66dcbd66566..a75a74647344 100644
> > --- a/drivers/clocksource/timer-riscv.c
> > +++ b/drivers/clocksource/timer-riscv.c
> > @@ -172,6 +172,9 @@ static int __init riscv_timer_init_common(void)
> >
> > sched_clock_register(riscv_sched_clock, 64, riscv_timebase);
> >
> > + /* Clear timer interrupt */
> > + riscv_clock_event_stop();
> > +
>
> The riscv_timer_init_common() is called only on boot HART.
>
> I suggest doing riscv_clock_event_stop() in riscv_timer_starting_cpu() just
> before enable_percpu_irq().
>
> I also suggest adding an appropriate Fixes tag in the commit description.
>
> Regards,
> Anup
>

Okay, will change it.

Thanks.

Regards
Ley Foon