Re: [PATCH v3 4/4] membarrier: riscv: Provide core serializing command

From: Andrea Parri
Date: Wed Jan 24 2024 - 16:43:55 EST


On Wed, Jan 24, 2024 at 01:56:39PM -0500, Mathieu Desnoyers wrote:
> On 2024-01-24 13:44, Andrea Parri wrote:
> > > > +# riscv uses xRET as return from interrupt and to return to user-space.
> > > > +#
> > > > +# Given that xRET is not core serializing, we rely on FENCE.I for providing
> > > > +# core serialization:
> > > > +#
> > > > +# - by calling sync_core_before_usermode() on return from interrupt (cf.
> > > > +# ipi_sync_core()),
> > > > +#
> > > > +# - via switch_mm() and sync_core_before_usermode() (respectively, for
> > > > +# uthread->uthread and kthread->uthread transitions) to go back to
> > > > +# user-space.
> > >
> > > I don't quite get the meaning of the sentence above. There seems to be a
> > > missing marker before "to go back".
> >
> > Let's see. Without the round brackets, the last part becomes:
> >
> > - via switch_mm() and sync_core_before_usermode() to go back to
> > user-space.
> >
> > This is indeed what I meant to say. What am I missing?
>
> Would it still fit your intent if we say "before returning to
> user-space" rather than "to go back to user-space" ?

Yes, works for me. Will change in v4.


> Because the switch_mm(), for instance, does not happen exactly on
> return to user-space, but rather when the scheduler switches tasks.
> Therefore, I think that stating that core serialization needs to
> happen before returning to user-space is clearer than stating that
> it happens "when" we go back to user-space.
>
> Also, on another topic, did you find a way forward with respect of
> the different choice of words between the membarrier man page and
> documentation vs the RISC-V official semantic with respect to "core
> serializing" vs FENCE.I ?

The way forward I envision involves the continuous (iterative) discussion
/review of the respective documentation and use-cases/litmus tests/models
/etc.

AFAICS, that is not that different from discussions about smp_mb() (as in
memory-barriers.txt) vs. FENCE RW,RW (RISC-V ISA manual) - only time will
tell.

Andrea