Re: [PATCH v10 16/29] KVM: selftests: Test Intel PMU architectural events on gp counters

[Sean Christopherson]

On Fri, Jan 12, 2024, Dapeng Mi wrote:
> 
> On 1/10/2024 7:02 AM, Sean Christopherson wrote:
> > +/*
> > + * If an architectural event is supported and guaranteed to generate at least
> > + * one "hit, assert that its count is non-zero.  If an event isn't supported or
> > + * the test can't guarantee the associated action will occur, then all bets are
> > + * off regarding the count, i.e. no checks can be done.
> > + *
> > + * Sanity check that in all cases, the event doesn't count when it's disabled,
> > + * and that KVM correctly emulates the write of an arbitrary value.
> > + */
> > +static void guest_assert_event_count(uint8_t idx,
> > +				     struct kvm_x86_pmu_feature event,
> > +				     uint32_t pmc, uint32_t pmc_msr)
> > +{
> > +	uint64_t count;
> > +
> > +	count = _rdpmc(pmc);
> > +	if (!this_pmu_has(event))
> > +		goto sanity_checks;
> > +
> > +	switch (idx) {
> > +	case INTEL_ARCH_INSTRUCTIONS_RETIRED_INDEX:
> > +		GUEST_ASSERT_EQ(count, NUM_INSNS_RETIRED);
> > +		break;
> > +	case INTEL_ARCH_BRANCHES_RETIRED_INDEX:
> > +		GUEST_ASSERT_EQ(count, NUM_BRANCHES);
> > +		break;
> > +	case INTEL_ARCH_CPU_CYCLES_INDEX:
> > +	case INTEL_ARCH_REFERENCE_CYCLES_INDEX:
> 
> Since we already support slots event in below guest_test_arch_event(), we
> can add check for INTEL_ARCH_TOPDOWN_SLOTS_INDEX here.

Can that actually be tested at this point, since KVM doesn't support
X86_PMU_FEATURE_TOPDOWN_SLOTS, i.e. this_pmu_has() above should always fail, no?

I'm hesitant to add an assertion of any king without the ability to actually test
the code.