[PATCH 4/4] riscv: dts: add resets property for uart node

From: Chen Wang
Date: Tue Jan 09 2024 - 04:19:30 EST


From: Chen Wang <unicorn_wang@xxxxxxxxxxx>

Add resets property for uart0 for completeness, although it is
deasserted by default.

Signed-off-by: Chen Wang <unicorn_wang@xxxxxxxxxxx>
---
arch/riscv/boot/dts/sophgo/sg2042.dtsi | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
index f59081d4f0ee..03266f216021 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
@@ -327,6 +327,7 @@ uart0: serial@7040000000 {
clock-frequency = <500000000>;
reg-shift = <2>;
reg-io-width = <4>;
+ resets = <&rstgen RST_UART0>;
status = "disabled";
};
};
--
2.25.1