Re: [PATCH] net: phy: marvell-88q2xxx: add driver for the Marvell 88Q2220 PHY

From: Andrew Lunn
Date: Fri Jan 05 2024 - 09:01:23 EST


On Fri, Jan 05, 2024 at 01:42:21PM +0100, Dimitri Fedrau wrote:
> Am Tue, Dec 19, 2023 at 04:57:50PM +0100 schrieb Andrew Lunn:
> > > I am not sure that it will be accepted by the maintainers if you use a
> > > lot of registers that are not documented.
> >
> > Sometimes there is no choice, there is no documentation except the
> > vendor crap driver which we try to clean up as much as possible, but
> > we still end up with lots of magic numbers.
> >
>
> Hi Andrew, hi Stefan,
>
> tried to reduce the init sequence. This worked for me:
>
> static int mv88q222x_config_init(struct phy_device *phydev)
> {
> int ret;
>
> /* send_s detection threshold, slave and master */
> ret = phy_write_mmd(phydev, MDIO_MMD_AN, 0x8032, 0x2020);
> if (ret < 0)
> return ret;
>
> ret = phy_write_mmd(phydev, MDIO_MMD_AN, 0x8031, 0xa28);
> if (ret < 0)
> return ret;
>
> ret = phy_write_mmd(phydev, MDIO_MMD_AN, 0x8031, 0xc28);
> if (ret < 0)
> return ret;
>
> ret = phy_write_mmd(phydev, MDIO_MMD_PCS, 0xffe4, 0xc);
> if (ret < 0)
> return ret;
>
> return mv88q2xxx_config_init(phydev);
> }
>
> The four register writes were required to make the PHY work in 1000Mbit forced
> mode. When using autonegotiation or 100Mbit forced mode they weren't needed.
> It was enough to write them once in mv88q222x_config_init as you can
> see. Thanks Stefan for the hint with the first three register writes, it
> helped a lot.

Hi Dimitri

Do we need to reduce the init sequence? Since this is all undocumented
magic which nobody understands, it would be safer to just keep with
the Marvell vendor crap code dump. Unless we really do need to change
it.

Andrew