Re: [PATCH 1/3] clk: qcom: gcc-sm8150: Register QUPv3 RCGs for DFS on SM8150

[Stephen Boyd]

Quoting Satya Priya Kakitapalli (2024-01-04 06:23:04)
> diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c
> index 05d115c52dfe..6d76fd344ddf 100644
> --- a/drivers/clk/qcom/gcc-sm8150.c
> +++ b/drivers/clk/qcom/gcc-sm8150.c
> @@ -453,19 +453,29 @@ static const struct freq_tbl ftbl_gcc_qupv3_wrap0_s0_clk_src[] = {
>         { }
>  };
>  
> +static struct clk_init_data gcc_qupv3_wrap0_s0_clk_src_init = {

Can these be const?

> +       .name = "gcc_qupv3_wrap0_s0_clk_src",
> +       .parent_data = gcc_parents_0,
> +       .num_parents = ARRAY_SIZE(gcc_parents_0),
> +       .flags = CLK_SET_RATE_PARENT,
> +       .ops = &clk_rcg2_ops,
> +};
> +
>  static struct clk_rcg2 gcc_qupv3_wrap0_s0_clk_src = {
>         .cmd_rcgr = 0x17148,
>         .mnd_width = 16,
>         .hid_width = 5,
>         .parent_map = gcc_parent_map_0,
>         .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src,
> -       .clkr.hw.init = &(struct clk_init_data){
> -               .name = "gcc_qupv3_wrap0_s0_clk_src",
[...]
> @@ -3786,6 +3850,13 @@ static int gcc_sm8150_probe(struct platform_device *pdev)
>         regmap_update_bits(regmap, 0x4d110, 0x3, 0x3);
>         regmap_update_bits(regmap, 0x71028, 0x3, 0x3);
>  
> +       ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks,
> +                                      ARRAY_SIZE(gcc_dfs_clocks));
> +       if (ret) {
> +               dev_err(&pdev->dev, "Failed to register with DFS!\n");

Use 

		return dev_err_probe(...);