Re: [PATCH V3] gpio: pmic-eic-sprd: Configure the bit corresponding to the EIC through offset

[Bartosz Golaszewski]

On Tue, Jan 2, 2024 at 9:28 AM Wenhua Lin <Wenhua.Lin@xxxxxxxxxx> wrote:
>
> A bank PMIC EIC contains 16 EICs, and the operating registers
> are BIT0-BIT15, such as BIT0 of the register operated by EIC0.
> Using the one-dimensional array reg[CACHE_NR_REGS] for maintenance
> will cause the configuration of other EICs to be affected when
> operating a certain EIC. In order to solve this problem, configure
> the bit corresponding to the EIC through offset.
>
> Signed-off-by: Wenhua Lin <Wenhua.Lin@xxxxxxxxxx>
> ---
> Change in V3:
> -Change title.
> -Change commit message.
> -Delete the modification of the two-dimensional array maintenance pmic eic,
>  and add the corresponding bits to configure the eic according to the offset.
> ---

Applied, thanks!

Bart