[PATCH 2/3] arm64: dts: qcom: sc8280xp: Correct USB PHY power domains

[Konrad Dybcio]

The USB GDSCs are only related to the controllers. The PHYs on the other
hand, are powered by VDD_MX and their specific VDDA_PHY/PLL regulators.

Fix the power-domains assignment to stop potentially toggling the GDSC
unnecessarily.

Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
---
 arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index 72c5818b67f2..4b18a0762ca7 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -2597,7 +2597,7 @@ usb_2_qmpphy0: phy@88ef000 {
 				 <&gcc GCC_USB3UNIPHY_PHY_MP0_BCR>;
 			reset-names = "phy", "phy_phy";
 
-			power-domains = <&gcc USB30_MP_GDSC>;
+			power-domains = <&rpmhpd SC8280XP_MX>;
 
 			#clock-cells = <0>;
 			clock-output-names = "usb2_phy0_pipe_clk";
@@ -2621,7 +2621,7 @@ usb_2_qmpphy1: phy@88f1000 {
 				 <&gcc GCC_USB3UNIPHY_PHY_MP1_BCR>;
 			reset-names = "phy", "phy_phy";
 
-			power-domains = <&gcc USB30_MP_GDSC>;
+			power-domains = <&rpmhpd SC8280XP_MX>;
 
 			#clock-cells = <0>;
 			clock-output-names = "usb2_phy1_pipe_clk";
@@ -3109,7 +3109,7 @@ usb_0_qmpphy: phy@88eb000 {
 				 <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
 			clock-names = "aux", "ref", "com_aux", "usb3_pipe";
 
-			power-domains = <&gcc USB30_PRIM_GDSC>;
+			power-domains = <&rpmhpd SC8280XP_MX>;
 
 			resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
 				 <&gcc GCC_USB4_DP_PHY_PRIM_BCR>;
@@ -3162,7 +3162,7 @@ usb_1_qmpphy: phy@8903000 {
 				 <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
 			clock-names = "aux", "ref", "com_aux", "usb3_pipe";
 
-			power-domains = <&gcc USB30_SEC_GDSC>;
+			power-domains = <&rpmhpd SC8280XP_MX>;
 
 			resets = <&gcc GCC_USB3_PHY_SEC_BCR>,
 				 <&gcc GCC_USB4_1_DP_PHY_PRIM_BCR>;

-- 
2.43.0