[PATCH v5 0/2] Add StarFive JH8100 watchdog

[Ji Sheng Teoh]

Changes since v4:
- Patch(1/2) expresses JH8100 compatibility to JH7110 in dt-binding,
  and adds minItems to constrain reset property.
- Patch(2/2) adds watchdog node in jh8100.dtsi. This patch depends on
  patch series [1] and [2].
[1]: Initial device tree support for StarFive JH8100 SoC
https://lore.kernel.org/all/20231201121410.95298-7-jeeheng.sia@xxxxxxxxxxxxxxxx/
[2]: Basic clock and reset support for StarFive JH8100 RISC-V SoC
https://lore.kernel.org/all/20231206115000.295825-17-jeeheng.sia@xxxxxxxxxxxxxxxx/

Changes since v3:
- Drop items in compatible field.
- Replace items with maxItems in reset field.
- Replace maxItems with items: -description in if else reset field

Changes since v2:
- Express JH8100 compatibility to JH7110 in dt-bindings.
- Rework min/maxItems constraint for JH8100 resets property.

Changes since v1:
- Drop "starfive,jh8100-wdt" compatible field in starfive-wdt.c,
  and express them in dt-bindings.
- Use minItems in resets field to cater for single reset signal
  in JH8100.
- Reword Watchdog reset to Core reset for JH8100.

StarFive's JH8100 watchdog reuses JH7100 register mapping.
DT-binding of JH7100 watchdog is extended to support JH8100.
Since JH8100 only uses 1 reset signal, update the binding to
support one reset for "starfive,jh8100-wdt" compatible.

Ji Sheng Teoh (2):
  dt-bindings: watchdog: starfive,jh7100-wdt: Add compatible for JH8100
  riscv: dts: starfive: jh8100: Add watchdog node

 .../watchdog/starfive,jh7100-wdt.yaml         | 40 ++++++++++++++-----
 arch/riscv/boot/dts/starfive/jh8100.dtsi      |  9 +++++
 2 files changed, 40 insertions(+), 9 deletions(-)

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2.25.1