Re: [PATCH 2/5] dt-bindings: clock: mobileye,eyeq5-clk: add bindings

From: Krzysztof Kozlowski
Date: Tue Dec 19 2023 - 02:38:29 EST


On 18/12/2023 18:14, Théo Lebrun wrote:
> Add DT schema bindings for the EyeQ5 clock controller driver.
>
> Signed-off-by: Théo Lebrun <theo.lebrun@xxxxxxxxxxx>
> ---
> .../bindings/clock/mobileye,eyeq5-clk.yaml | 83 ++++++++++++++++++++++
> MAINTAINERS | 2 +
> include/dt-bindings/clock/mobileye,eyeq5-clk.h | 22 ++++++
> 3 files changed, 107 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/mobileye,eyeq5-clk.yaml b/Documentation/devicetree/bindings/clock/mobileye,eyeq5-clk.yaml
> new file mode 100644
> index 000000000000..d56482a06bf1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/mobileye,eyeq5-clk.yaml
> @@ -0,0 +1,83 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/mobileye,eyeq5-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Mobileye EyeQ5 clock controller
> +
> +description:
> + The EyeQ5 clock controller handles 10 read-only PLLs derived from the main
> + crystal clock. It also exposes one divider clock, a child of one of the PLLs.
> + It is custom to this platform, its registers live in a shared region called
> + OLB.
> +
> +maintainers:
> + - Grégory Clement <gregory.clement@xxxxxxxxxxx>
> + - Théo Lebrun <theo.lebrun@xxxxxxxxxxx>
> + - Vladimir Kondratiev <vladimir.kondratiev@xxxxxxxxxxxx>
> +
> +properties:
> + $nodename:
> + pattern: "^clocks$"

No, that's not correct pattern.

Node names should be generic. See also an explanation and list of
examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation


> + description:
> + We have no unique address, we rely on OLB.

No.

I explained why in pinctrl patchset.

> +
> + compatible:
> + const: mobileye,eyeq5-clk
> +
> + "#clock-cells":
> + const: 1
> +
> + clocks:
> + maxItems: 1
> + description:
> + Input parent clock to all PLLs. Expected to be the main crystal.
> +
> + clock-names:
> + items:
> + - const: ref
> +
> + mobileye,olb:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + A phandle to the OLB syscon. This is a fallback to using the parent as
> + syscon node.

Drop.

> +
> +required:
> + - compatible
> + - "#clock-cells"
> + - clocks
> + - clock-names
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + olb@e00000 {
> + compatible = "mobileye,eyeq5-olb", "syscon", "simple-mfd";

Drop, not related.

> + reg = <0xe00000 0x400>;
> + reg-io-width = <4>;
> +
> + clocks {
> + compatible = "mobileye,eyeq5-clk";
> + #clock-cells = <1>;
> + clocks = <&xtal>;
> + clock-names = "ref";
> + };
> + };
> +
> + - |
> + olb: olb@e00000 {
> + compatible = "mobileye,eyeq5-olb", "syscon", "simple-mfd";

Drop, even less related. Still no explanation why you represent the same
hardware in two different ways.


Best regards,
Krzysztof