[PATCH v2] drivers: soc: atmel: Adjust defines to follow aphabetical order
From: Ryan.Wanner
Date: Fri Dec 08 2023 - 14:45:51 EST
From: Ryan Wanner <Ryan.Wanner@xxxxxxxxxxxxx>
Move the defines so that they are in aphabetical order based on SOC.
Signed-off-by: Ryan Wanner <Ryan.Wanner@xxxxxxxxxxxxx>
---
Changes from v1 -> v2:
- Remove defines that are not yet in v6.7.
drivers/soc/atmel/soc.h | 38 +++++++++++++++++++-------------------
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/drivers/soc/atmel/soc.h b/drivers/soc/atmel/soc.h
index 7a9f47ce85fb..1f2af6f74160 100644
--- a/drivers/soc/atmel/soc.h
+++ b/drivers/soc/atmel/soc.h
@@ -39,10 +39,10 @@ at91_soc_init(const struct at91_soc *socs);
#define AT91SAM9261_CIDR_MATCH 0x019703a0
#define AT91SAM9263_CIDR_MATCH 0x019607a0
#define AT91SAM9G20_CIDR_MATCH 0x019905a0
-#define AT91SAM9RL64_CIDR_MATCH 0x019b03a0
#define AT91SAM9G45_CIDR_MATCH 0x019b05a0
-#define AT91SAM9X5_CIDR_MATCH 0x019a05a0
#define AT91SAM9N12_CIDR_MATCH 0x019a07a0
+#define AT91SAM9RL64_CIDR_MATCH 0x019b03a0
+#define AT91SAM9X5_CIDR_MATCH 0x019a05a0
#define SAM9X60_CIDR_MATCH 0x019b35a0
#define SAMA7G5_CIDR_MATCH 0x00162100
@@ -61,23 +61,15 @@ at91_soc_init(const struct at91_soc *socs);
#define AT91SAM9N12_EXID_MATCH 0x00000006
#define AT91SAM9CN11_EXID_MATCH 0x00000009
+#define AT91SAM9XE128_CIDR_MATCH 0x329973a0
+#define AT91SAM9XE256_CIDR_MATCH 0x329a93a0
+#define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0
+
#define SAM9X60_EXID_MATCH 0x00000000
#define SAM9X60_D5M_EXID_MATCH 0x00000001
#define SAM9X60_D1G_EXID_MATCH 0x00000010
#define SAM9X60_D6K_EXID_MATCH 0x00000011
-#define SAMA7G51_EXID_MATCH 0x3
-#define SAMA7G52_EXID_MATCH 0x2
-#define SAMA7G53_EXID_MATCH 0x1
-#define SAMA7G54_EXID_MATCH 0x0
-#define SAMA7G54_D1G_EXID_MATCH 0x00000018
-#define SAMA7G54_D2G_EXID_MATCH 0x00000020
-#define SAMA7G54_D4G_EXID_MATCH 0x00000028
-
-#define AT91SAM9XE128_CIDR_MATCH 0x329973a0
-#define AT91SAM9XE256_CIDR_MATCH 0x329a93a0
-#define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0
-
#define SAMA5D2_CIDR_MATCH 0x0a5c08c0
#define SAMA5D21CU_EXID_MATCH 0x0000005a
#define SAMA5D225C_D1M_EXID_MATCH 0x00000053
@@ -113,6 +105,14 @@ at91_soc_init(const struct at91_soc *socs);
#define SAMA5D43_EXID_MATCH 0x00000003
#define SAMA5D44_EXID_MATCH 0x00000004
+#define SAMA7G51_EXID_MATCH 0x3
+#define SAMA7G52_EXID_MATCH 0x2
+#define SAMA7G53_EXID_MATCH 0x1
+#define SAMA7G54_EXID_MATCH 0x0
+#define SAMA7G54_D1G_EXID_MATCH 0x00000018
+#define SAMA7G54_D2G_EXID_MATCH 0x00000020
+#define SAMA7G54_D4G_EXID_MATCH 0x00000028
+
#define SAME70Q21_CIDR_MATCH 0x21020e00
#define SAME70Q21_EXID_MATCH 0x00000002
#define SAME70Q20_CIDR_MATCH 0x21020c00
@@ -127,6 +127,11 @@ at91_soc_init(const struct at91_soc *socs);
#define SAMS70Q19_CIDR_MATCH 0x211d0a00
#define SAMS70Q19_EXID_MATCH 0x00000002
+#define SAMV70Q20_CIDR_MATCH 0x21320c00
+#define SAMV70Q20_EXID_MATCH 0x00000002
+#define SAMV70Q19_CIDR_MATCH 0x213d0a00
+#define SAMV70Q19_EXID_MATCH 0x00000002
+
#define SAMV71Q21_CIDR_MATCH 0x21220e00
#define SAMV71Q21_EXID_MATCH 0x00000002
#define SAMV71Q20_CIDR_MATCH 0x21220c00
@@ -134,9 +139,4 @@ at91_soc_init(const struct at91_soc *socs);
#define SAMV71Q19_CIDR_MATCH 0x212d0a00
#define SAMV71Q19_EXID_MATCH 0x00000002
-#define SAMV70Q20_CIDR_MATCH 0x21320c00
-#define SAMV70Q20_EXID_MATCH 0x00000002
-#define SAMV70Q19_CIDR_MATCH 0x213d0a00
-#define SAMV70Q19_EXID_MATCH 0x00000002
-
#endif /* __AT91_SOC_H */
--
2.39.2