[PATCH v3 0/5] mtd: spi-nor: introduce die erase

From: Tudor Ambarus
Date: Sat Nov 25 2023 - 07:35:47 EST


changes in v3:
- fix code, thanks to Fabio's testing
- found a n25q00 and tested on my side too
- fixed micron's die erase support

Add support for die erase.
JESD216 mentions die erase, but does not provide an opcode for it.
Check BFPT dword 11, bits 30:24, "Chip Erase, Typical time", it says:

"Typical time to erase one chip (die). User must poll device busy to
determine if the operation has completed. For a device consisting of
multiple dies, that are individually accessed, the time is for each die
to which a chip erase command is applied."

So when a flash consists of a single die, this is the erase time for the
full chip (die) erase, and when it consists of multiple dies, it's the
die erase time. Chip and die are the same thing.

For what concerns the Micron flashes, unfortunately Micron does not
provide a 4-byte opcode equivalent for the die erase. The SFDP 4BAIT
table fails to consider the die erase too, the standard can be improved.
Thus we're forced to enter in the 4 byte address mode in order to benefit
of the die erase. This comes with some changes into the core.

Tested on n25q00. This flash defines the 4BAIT SFDP table, thus it will
use the 4BAIT opcodes for reads, page programs or erases, with the
exception that it will use the die erase command in the 4 byte address
mode.

Fabio Estevam (1):
mtd: spi-nor: micron-st: Add support for mt25qu01g

Tudor Ambarus (4):
mtd: spi-nor: add erase die (chip) capability
mtd: spi-nor: spansion: enable die erase for multi die flashes
mtd: spi-nor: micron-st: enable die erase for multi die flashes
mtd: spi-nor: remove NO_CHIP_ERASE flag

drivers/mtd/spi-nor/core.c | 143 ++++++++++++++++++++------------
drivers/mtd/spi-nor/core.h | 16 ++--
drivers/mtd/spi-nor/debugfs.c | 2 +-
drivers/mtd/spi-nor/micron-st.c | 59 ++++++++++++-
drivers/mtd/spi-nor/spansion.c | 4 +-
5 files changed, 158 insertions(+), 66 deletions(-)

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2.34.1