Re: [PATCH] usb: dwc3: don't reset device side if dwc3 was configured as host-only

From: Köry Maincent
Date: Tue Nov 21 2023 - 04:49:47 EST


Hello Thinh,

On Fri, 17 Nov 2023 01:55:30 +0000
Thinh Nguyen <Thinh.Nguyen@xxxxxxxxxxxx> wrote:

> > How many ports do you use? Can you try this:
> >
> > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> > index 0328c86ef806..9921c2737829 100644
> > --- a/drivers/usb/dwc3/core.c
> > +++ b/drivers/usb/dwc3/core.c
> > @@ -296,23 +296,28 @@ int dwc3_core_soft_reset(struct dwc3 *dwc)
> > if (dwc->dr_mode == USB_DR_MODE_HOST) {
> > u32 usb3_port;
> > u32 usb2_port;
> > + int i;
> >
> > - usb3_port = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
> > - usb3_port |= DWC3_GUSB3PIPECTL_PHYSOFTRST;
> > - dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), usb3_port);
> > + for (i = 0; i < 16; i++) {
> > + usb3_port = dwc3_readl(dwc->regs,
> > DWC3_GUSB3PIPECTL(i));
> > + usb3_port |= DWC3_GUSB3PIPECTL_PHYSOFTRST;
> > + dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(i),
> > usb3_port);
> > - usb2_port = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
> > - usb2_port |= DWC3_GUSB2PHYCFG_PHYSOFTRST;
> > - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), usb2_port);
> > + usb2_port = dwc3_readl(dwc->regs,
> > DWC3_GUSB2PHYCFG(i));
> > + usb2_port |= DWC3_GUSB2PHYCFG_PHYSOFTRST;
> > + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i),
> > usb2_port);
> > + }
> >
> > /* Small delay for phy reset assertion */
> > usleep_range(1000, 2000);
> >
> > - usb3_port &= ~DWC3_GUSB3PIPECTL_PHYSOFTRST;
> > - dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), usb3_port);
> > + for (i = 0; i < 16; i++) {
> > + usb3_port &= ~DWC3_GUSB3PIPECTL_PHYSOFTRST;
> > + dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(i),
> > usb3_port);
> > - usb2_port &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
> > - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), usb2_port);
> > + usb2_port &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
> > + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i),
> > usb2_port);
> > + }
> >
> > /* Wait for clock synchronization */
> > msleep(50);
> > --

Still not working on my side.

Regards,
--
Köry Maincent, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com