Re: [PATCH 07/16] arm64: dts: qcom: sm8550-aim300: add PCIe0

[neil . armstrong]

On 17/11/2023 11:29, Dmitry Baryshkov wrote:
> On 17/11/2023 12:18, Tengfei Fan wrote:
> > Add PCIe0 nodes used with WCN7851 device.  The PCIe1 is not connected,
> > thus skip pcie_1_phy_aux_clk input clock to GCC.
> >
> > Signed-off-by: Tengfei Fan <quic_tengfan@xxxxxxxxxxx>
> > ---
> >   arch/arm64/boot/dts/qcom/sm8550-aim300.dts | 32 ++++++++++++++++++++++
> >   1 file changed, 32 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm8550-aim300.dts b/arch/arm64/boot/dts/qcom/sm8550-aim300.dts
> > index 202b979da8ca..3aca0a433a00 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8550-aim300.dts
> > +++ b/arch/arm64/boot/dts/qcom/sm8550-aim300.dts
> > @@ -393,6 +393,38 @@
> >       };
> >   };
> > +&gcc {
> > +    clocks = <&bi_tcxo_div2>, <&sleep_clk>,
> > +         <&pcie0_phy>,
> > +         <&pcie1_phy>,
> > +         <0>,
> > +         <&ufs_mem_phy 0>,
> > +         <&ufs_mem_phy 1>,
> > +         <&ufs_mem_phy 2>,
> > +         <&usb_dp_qmpphy QMP_USB43DP_USB3_PIPE_CLK>;
> > +};
>
> NAK, this should go to sm8550.dtsi unless there is a good reason.

Actually this is how QRD8550 was designed, so it's fine to mimic.

Neil

> > +
> > +&pcie_1_phy_aux_clk {
> > +    status = "disabled";
> > +};
> > +
> > +&pcie0 {
> > +    perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
> > +    wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
> > +
> > +    pinctrl-0 = <&pcie0_default_state>;
> > +    pinctrl-names = "default";
> > +
> > +    status = "okay";
> > +};
> > +
> > +&pcie0_phy {
> > +    vdda-phy-supply = <&vreg_l1e_0p88>;
> > +    vdda-pll-supply = <&vreg_l3e_1p2>;
> > +
> > +    status = "okay";
> > +};
> > +
> >   &pm8550b_eusb2_repeater {
> >       vdd18-supply = <&vreg_l15b_1p8>;
> >       vdd3-supply = <&vreg_l5b_3p1>;