Re: [PATCH 1/9] net: mdio: ipq4019: increase eth_ldo_rdy for ipq5332 platform

[Krzysztof Kozlowski]

On 15/11/2023 04:25, Luo Jie wrote:
> There are two PCS(UNIPHY) supported in SOC side on ipq5332,
> and three PCS(UNIPHY) supported on ipq9574.
> 
> Signed-off-by: Luo Jie <quic_luoj@xxxxxxxxxxx>
> ---
>  drivers/net/mdio/mdio-ipq4019.c | 55 +++++++++++++++++++--------------
>  1 file changed, 32 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/net/mdio/mdio-ipq4019.c b/drivers/net/mdio/mdio-ipq4019.c
> index abd8b508ec16..9d444f5f7efb 100644
> --- a/drivers/net/mdio/mdio-ipq4019.c
> +++ b/drivers/net/mdio/mdio-ipq4019.c
> @@ -18,28 +18,31 @@
>  #define MDIO_DATA_WRITE_REG			0x48
>  #define MDIO_DATA_READ_REG			0x4c
>  #define MDIO_CMD_REG				0x50
> -#define MDIO_CMD_ACCESS_BUSY		BIT(16)
> -#define MDIO_CMD_ACCESS_START		BIT(8)
> -#define MDIO_CMD_ACCESS_CODE_READ	0
> -#define MDIO_CMD_ACCESS_CODE_WRITE	1
> -#define MDIO_CMD_ACCESS_CODE_C45_ADDR	0
> -#define MDIO_CMD_ACCESS_CODE_C45_WRITE	1
> -#define MDIO_CMD_ACCESS_CODE_C45_READ	2
> +#define MDIO_CMD_ACCESS_BUSY			BIT(16)
> +#define MDIO_CMD_ACCESS_START			BIT(8)
> +#define MDIO_CMD_ACCESS_CODE_READ		0
> +#define MDIO_CMD_ACCESS_CODE_WRITE		1
> +#define MDIO_CMD_ACCESS_CODE_C45_ADDR		0
> +#define MDIO_CMD_ACCESS_CODE_C45_WRITE		1
> +#define MDIO_CMD_ACCESS_CODE_C45_READ		2

Where is anything related to ipq5332 here?


..

>  	bus->name = "ipq4019_mdio";
>  	bus->read = ipq4019_mdio_read_c22;
> @@ -288,6 +296,7 @@ static void ipq4019_mdio_remove(struct platform_device *pdev)
>  static const struct of_device_id ipq4019_mdio_dt_ids[] = {
>  	{ .compatible = "qcom,ipq4019-mdio" },
>  	{ .compatible = "qcom,ipq5018-mdio" },
> +	{ .compatible = "qcom,ipq5332-mdio" },

How user comes before binding?

Best regards,
Krzysztof