sound/soc/codecs/nau8822.c:199:25: sparse: sparse: incorrect type in assignment (different base types)

[kernel test robot]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   1b907d0507354b74a4f2c286380cd6059af79248
commit: 1e3cb6c321be2e5295dcaa94c2bf42a43a47a067 ASoC: nau8822: new codec driver
date:   5 years ago
config: x86_64-randconfig-x014-20230805 (https://download.01.org/0day-ci/archive/20231112/202311122320.T1opZVkP-lkp@xxxxxxxxx/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231112/202311122320.T1opZVkP-lkp@xxxxxxxxx/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@xxxxxxxxx>
| Closes: https://lore.kernel.org/oe-kbuild-all/202311122320.T1opZVkP-lkp@xxxxxxxxx/

sparse warnings: (new ones prefixed by >>)
>> sound/soc/codecs/nau8822.c:199:25: sparse: sparse: incorrect type in assignment (different base types) @@     expected unsigned short [assigned] [usertype] reg_val @@     got restricted __be16 [usertype] @@
   sound/soc/codecs/nau8822.c:199:25: sparse:     expected unsigned short [assigned] [usertype] reg_val
   sound/soc/codecs/nau8822.c:199:25: sparse:     got restricted __be16 [usertype]
>> sound/soc/codecs/nau8822.c:235:25: sparse: sparse: cast to restricted __be16
>> sound/soc/codecs/nau8822.c:235:25: sparse: sparse: cast to restricted __be16
>> sound/soc/codecs/nau8822.c:235:25: sparse: sparse: cast to restricted __be16
>> sound/soc/codecs/nau8822.c:235:25: sparse: sparse: cast to restricted __be16

vim +199 sound/soc/codecs/nau8822.c

   176	
   177	/* The EQ parameters get function is to get the 5 band equalizer control.
   178	 * The regmap raw read can't work here because regmap doesn't provide
   179	 * value format for value width of 9 bits. Therefore, the driver reads data
   180	 * from cache and makes value format according to the endianness of
   181	 * bytes type control element.
   182	 */
   183	static int nau8822_eq_get(struct snd_kcontrol *kcontrol,
   184		struct snd_ctl_elem_value *ucontrol)
   185	{
   186		struct snd_soc_component *component =
   187				snd_soc_kcontrol_component(kcontrol);
   188		struct soc_bytes_ext *params = (void *)kcontrol->private_value;
   189		int i, reg;
   190		u16 reg_val, *val;
   191	
   192		val = (u16 *)ucontrol->value.bytes.data;
   193		reg = NAU8822_REG_EQ1;
   194		for (i = 0; i < params->max / sizeof(u16); i++) {
   195			reg_val = snd_soc_component_read32(component, reg + i);
   196			/* conversion of 16-bit integers between native CPU format
   197			 * and big endian format
   198			 */
 > 199			reg_val = cpu_to_be16(reg_val);
   200			memcpy(val + i, &reg_val, sizeof(reg_val));
   201		}
   202	
   203		return 0;
   204	}
   205	
   206	/* The EQ parameters put function is to make configuration of 5 band equalizer
   207	 * control. These configuration includes central frequency, equalizer gain,
   208	 * cut-off frequency, bandwidth control, and equalizer path.
   209	 * The regmap raw write can't work here because regmap doesn't provide
   210	 * register and value format for register with address 7 bits and value 9 bits.
   211	 * Therefore, the driver makes value format according to the endianness of
   212	 * bytes type control element and writes data to codec.
   213	 */
   214	static int nau8822_eq_put(struct snd_kcontrol *kcontrol,
   215		struct snd_ctl_elem_value *ucontrol)
   216	{
   217		struct snd_soc_component *component =
   218				snd_soc_kcontrol_component(kcontrol);
   219		struct soc_bytes_ext *params = (void *)kcontrol->private_value;
   220		void *data;
   221		u16 *val, value;
   222		int i, reg, ret;
   223	
   224		data = kmemdup(ucontrol->value.bytes.data,
   225			params->max, GFP_KERNEL | GFP_DMA);
   226		if (!data)
   227			return -ENOMEM;
   228	
   229		val = (u16 *)data;
   230		reg = NAU8822_REG_EQ1;
   231		for (i = 0; i < params->max / sizeof(u16); i++) {
   232			/* conversion of 16-bit integers between native CPU format
   233			 * and big endian format
   234			 */
 > 235			value = be16_to_cpu(*(val + i));
   236			ret = snd_soc_component_write(component, reg + i, value);
   237			if (ret) {
   238				dev_err(component->dev,
   239				    "EQ configuration fail, register: %x ret: %d\n",
   240				    reg + i, ret);
   241				kfree(data);
   242				return ret;
   243			}
   244		}
   245		kfree(data);
   246	
   247		return 0;
   248	}
   249	

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