Re: [PATCH v2 6/7] phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for SM8550

[neil . armstrong]

Hi,

On 10/11/2023 10:03, Can Guo wrote:
> Hi Neil,
>
> On 11/10/2023 4:47 PM, neil.armstrong@xxxxxxxxxx wrote:
> > Hi,
> >
> > On 07/11/2023 05:46, Can Guo wrote:
> > > From: Can Guo <quic_cang@xxxxxxxxxxx>
> > >
> > > On SM8550, two sets of UFS PHY settings are provided, one set is to support
> > > HS-G5, another set is to support HS-G4 and lower gears. The two sets of PHY
> > > settings are programming different values to different registers, mixing
> > > the two sets and/or overwriting one set with another set is definitely not
> > > blessed by UFS PHY designers. In order to add HS-G5 support for SM8550, we
> > > need to split the two sets into their dedicated tables, and leave only the
> > > common settings in the .tlbs. To have the PHY programmed with the correct
> > > set of PHY settings, the submode passed to PHY driver must be either HS-G4
> > > or HS-G5.
> >
> > I guess I'll need to rebase my SM8650 UFS PHY driver to support both G4 and G5 modes
> > at some point ?
>
>
> Thank for reaching out. Yes, please.
>
> I can help review the PHY settings.

Ok I'll try rebasing on this serie and add G5 support.

> BTW, are you enabling MCQ (by adding MCQ related DT) at the same time?

I tested MCQ but it triggers the same issues we have with suspend/resume on SM8550 & SM8650,
and the bindings are not present of the UFS qcom node.

Neil

> Thanks,
> Can Guo.
>
> > Neil