Re: [PATCH v2] i2c: designware: Disable TX_EMPTY irq while waiting for block length byte

[Wolfram Sang]

On Thu, Nov 02, 2023 at 10:30:08AM +0700, Tam Nguyen wrote:
> During SMBus block data read process, we have seen high interrupt rate
> because of TX_EMPTY irq status while waiting for block length byte (the
> first data byte after the address phase). The interrupt handler does not
> do anything because the internal state is kept as STATUS_WRITE_IN_PROGRESS.
> Hence, we should disable TX_EMPTY IRQ until I2C DesignWare receives
> first data byte from I2C device, then re-enable it to resume SMBus
> transaction.
> 
> It takes 0.789 ms for host to receive data length from slave.
> Without the patch, i2c_dw_isr() is called 99 times by TX_EMPTY interrupt.
> And it is none after applying the patch.
> 
> Cc: stable@xxxxxxxxxxxxxxx
> Co-developed-by: Chuong Tran <chuong@xxxxxxxxxxxxxxxxxxxxxx>
> Signed-off-by: Chuong Tran <chuong@xxxxxxxxxxxxxxxxxxxxxx>
> Signed-off-by: Tam Nguyen <tamnguyenchi@xxxxxxxxxxxxxxxxxxxxxx>

Applied to for-current, thanks!

Attachment: signature.asc
Description: PGP signature