[PATCH] dt-bindings: soc: Add new board description for MicroBlaze V

[Michal Simek]

MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP.
It is hardware compatible with classic MicroBlaze processor. Processor can
be used with standard AMD/Xilinx IPs including interrupt controller and
timer.

Signed-off-by: Michal Simek <michal.simek@xxxxxxx>
---

 .../devicetree/bindings/soc/amd/amd.yaml      | 26 +++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/amd/amd.yaml

diff --git a/Documentation/devicetree/bindings/soc/amd/amd.yaml b/Documentation/devicetree/bindings/soc/amd/amd.yaml
new file mode 100644
index 000000000000..21adf28756fa
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/amd/amd.yaml
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/amd/amd.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: AMD Platforms
+
+maintainers:
+  - Michal Simek <michal.simek@xxxxxxx>
+
+description: |
+  AMD boards with MicroBlaze V SOC
+
+properties:
+  $nodename:
+    const: '/'
+  compatible:
+    oneOf:
+      - description: AMD MicroBlaze V
+        items:
+          - const: amd,mbv
+
+additionalProperties: true
+
+...
-- 
2.36.1