Re: [PATCH v4 2/2] PCI: mediatek-gen3: Add power and reset control feature for downstream component
From: AngeloGioacchino Del Regno
Date: Mon Nov 06 2023 - 03:57:00 EST
Il 06/11/23 09:46, Krzysztof Kozlowski ha scritto:
On 06/11/2023 09:36, AngeloGioacchino Del Regno wrote:
Il 06/11/23 08:53, Krzysztof Kozlowski ha scritto:
On 06/11/2023 07:12, Jian Yang wrote:
From: "jian.yang" <jian.yang@xxxxxxxxxxxx>
Make MediaTek's controller driver capable of controlling power
supplies and reset pin of a downstream component in power-on and
power-off process.
Some downstream components (e.g., a WIFI chip) may need an extra
reset other than PERST# and their power supplies, depending on
the requirements of platform, may need to controlled by their
parent's driver. To meet the requirements described above, I add this
feature to MediaTek's PCIe controller driver as an optional feature.
NAK, strong NAK. This should be done in a generic way because nothing
here is specific to Mediatek.
You just implement power sequencing of devices through quirks specific
to one controller.
Work with others to provide common solution.
https://lpc.events/event/17/contributions/1507/
I agree that working with everyone else by adding pwrseq is a must, but other
other PCIe controllers are doing the exact same as this patch: if the supply
and gpio names are aligned with the others, why shouldn't we let this in and
then convert this driver, along with the others, to the new pwrseq subsystem
when it's ready?
Because you already push to the PCI controller bindings new properties
which are not properties of the PCI controller.
That, because I expect the pwrseq to require a bit more time before being
ready to get upstream.
P.S.: Check Tegra, Broadcom, RockChip DW, IMX6Q-pcie.
Every new hack will not make it faster. :( At some point one have to say
- enough of hacks, start doing it properly with upstream.
Eh, that's a fair point. I can't really disagree with that.
Cheers,
Angelo