Re: [PATCH 2/3] iommu/arm-smmu: add ACTLR data and support for SM8550

[Bibek Kumar Patro]

On 11/4/2023 4:59 PM, Konrad Dybcio wrote:
> On 11/3/23 22:51, Bibek Kumar Patro wrote:
> > Add ACTLR data table for SM8550 along with support for
> > same including SM8550 specific implementation operations.
> >
> > Signed-off-by: Bibek Kumar Patro <quic_bibekkum@xxxxxxxxxxx>
> > ---
> >   drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 85 +++++++++++++++++++++-
> >   1 file changed, 81 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c 
> > b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> > index 68c1f4908473..590b7c285299 100644
> > --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> > +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> > @@ -25,6 +25,64 @@ struct actlr_data {
> >       u32 actlr;
> >   };
> >
> > +static const struct actlr_data sm8550_apps_actlr_data[] = {
> I assume this data will be different for each SoC.. perhaps
> moving this to a separate file (not sure if dt makes sense if
> it's hardcoded per platform) makes sense.

Yes, this data will be different for each SoC.
Right, adding these properties in dt won't be a right thing
since this is a register setting and not a hardware defining property.
As per my understanding passing register content via device tree is 
highly discouraged, so hosting this data inside the driver.
For reference, adding the RFC link archiving this discussion:
https://lore.kernel.org/all/a01e7e60-6ead-4a9e-ba90-22a8a6bbd03f@xxxxxxxxxxx/#t
If my recollection is correct, some drivers like llcc is also
following similar implementation
drivers/phy/qualcomm/phy-qcom-qmp-combo.c
drivers/soc/qcom/llcc-qcom.c


> This will also assume that these can not differ between firmware
> versions.

Right, these won't differ between firmware versions.

Thanks & regards,
Bibek

> Konrad