Re: [PATCH net-next v8 5/7] net: phy: nxp-c45-tja11xx: add MACsec support

From: Simon Horman
Date: Sat Nov 04 2023 - 07:35:33 EST


On Mon, Oct 23, 2023 at 12:43:25PM +0300, Radu Pirea (NXP OSS) wrote:
> Add MACsec support.
> The MACsec block has four TX SCs and four RX SCs. The driver supports up
> to four SecY. Each SecY with one TX SC and one RX SC.
> The RX SCs can have two keys, key A and key B, written in hardware and
> enabled at the same time.
> The TX SCs can have two keys written in hardware, but only one can be
> active at a given time.
> On TX, the SC is selected using the MAC source address. Due of this
> selection mechanism, each offloaded netdev must have a unique MAC
> address.
> On RX, the SC is selected by SCI(found in SecTAG or calculated using MAC
> SA), or using RX SC 0 as implicit.
>
> Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@xxxxxxxxxxx>

...

> +void nxp_c45_handle_macsec_interrupt(struct phy_device *phydev,
> + irqreturn_t *ret)
> +{
> + struct nxp_c45_phy *priv = phydev->priv;
> + struct nxp_c45_secy *pos, *tmp;
> + struct nxp_c45_sa *sa;
> + u8 encoding_sa;
> + int secy_id;
> + u32 reg = 0;
> +
> + if (!priv->macsec)
> + return;
> +
> + do {
> + nxp_c45_macsec_read(phydev, MACSEC_EVR, &reg);
> + if (!reg)
> + return;
> +
> + secy_id = MACSEC_REG_SIZE - ffs(reg);
> + list_for_each_entry_safe(pos, tmp, &priv->macsec->secy_list,
> + list)
> + if (pos->secy_id == secy_id)
> + break;
> +
> + encoding_sa = pos->secy->tx_sc.encoding_sa;

Hi Radu,

I'm unsure if this can happen, but my understanding is that if
priv->macsec->secy_list is empty then pos will be uninitialised here.

Flagged by Coccinelle.

> + phydev_dbg(phydev, "pn_wrapped: TX SC %d, encoding_sa %u\n",
> + pos->secy_id, encoding_sa);
> +
> + sa = nxp_c45_find_sa(&pos->sa_list, TX_SA, encoding_sa);
> + if (!IS_ERR(sa))
> + macsec_pn_wrapped(pos->secy, sa->sa);
> + else
> + WARN_ON(1);
> +
> + nxp_c45_macsec_write(phydev, MACSEC_EVR,
> + TX_SC_BIT(pos->secy_id));
> + *ret = IRQ_HANDLED;
> + } while (reg);
> +}

...