Re: [PATCH] [v2] clk: meson: S4: select CONFIG_COMMON_CLK_MESON_CLKC_UTILS

From: Jerome Brunet
Date: Mon Oct 23 2023 - 10:22:35 EST



On Mon 23 Oct 2023 at 12:28, Arnd Bergmann <arnd@xxxxxxxxxx> wrote:

> From: Arnd Bergmann <arnd@xxxxxxxx>
>
> Without this, the newly added drivers fail to link:
>
> aarch64-linux-ld: drivers/clk/meson/s4-pll.o: in function `meson_s4_pll_probe':
> s4-pll.c:(.text+0x13c): undefined reference to `meson_clk_hw_get'
> aarch64-linux-ld: drivers/clk/meson/s4-peripherals.o: in function `meson_s4_periphs_probe':
> s4-peripherals.c:(.text+0xb0): undefined reference to `meson_clk_hw_get'
>
> Fixes: e787c9c55edad ("clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver")
> Reviewed-by: Jerome Brunet <jbrunet@xxxxxxxxxxxx>
> Reviewed-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
> Signed-off-by: Arnd Bergmann <arnd@xxxxxxxx>

Applied fixing this minor checkpatch warning (1 extra char)

WARNING: Please use correct Fixes: style 'Fixes: <12 chars of sha1> ("<title line>")' - ie: 'Fixes: e787c9c55eda ("clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver")'

and preparing the PR for Stephen now.
Thanks Arnd.

> ---
> v2: fix up both drivers, the first version only addressed the s4-pll one.
> ---
> drivers/clk/meson/Kconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig
> index c5303e4c16043..29ffd14d267b6 100644
> --- a/drivers/clk/meson/Kconfig
> +++ b/drivers/clk/meson/Kconfig
> @@ -149,6 +149,7 @@ config COMMON_CLK_S4_PLL
> tristate "S4 SoC PLL clock controllers support"
> depends on ARM64
> default y
> + select COMMON_CLK_MESON_CLKC_UTILS
> select COMMON_CLK_MESON_MPLL
> select COMMON_CLK_MESON_PLL
> select COMMON_CLK_MESON_REGMAP
> @@ -161,6 +162,7 @@ config COMMON_CLK_S4_PERIPHERALS
> tristate "S4 SoC peripherals clock controllers support"
> depends on ARM64
> default y
> + select COMMON_CLK_MESON_CLKC_UTILS
> select COMMON_CLK_MESON_REGMAP
> select COMMON_CLK_MESON_DUALDIV
> select COMMON_CLK_MESON_VID_PLL_DIV