Re: [PATCH v2] riscv: mm: update T-Head memory type definitions

From: Jisheng Zhang
Date: Wed Oct 04 2023 - 08:19:44 EST


On Tue, Sep 12, 2023 at 03:25:10PM +0800, Jisheng Zhang wrote:
> Update T-Head memory type definitions according to C910 doc [1]
> For NC and IO, SH property isn't configurable, hardcoded as SH,
> so set SH for NOCACHE and IO.
>
> And also set bit[61](Bufferable) for NOCACHE according to the
> table 6.1 in the doc [1].
>
> Link: https://github.com/T-head-Semi/openc910 [1]
> Signed-off-by: Jisheng Zhang <jszhang@xxxxxxxxxx>
> Reviewed-by: Guo Ren <guoren@xxxxxxxxxx>
> Tested-by: Drew Fustini <dfustini@xxxxxxxxxxxx>

Hi Palmer,

I believe this is a fix, could you please review and take it for 6.6
fix?

Thanks

> ---
>
> Since v1:
> - collect Reviewed-by and Tested-by tag
> - rebase on linux 6.6-rc1
>
> arch/riscv/include/asm/pgtable-64.h | 14 +++++++++-----
> 1 file changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/arch/riscv/include/asm/pgtable-64.h b/arch/riscv/include/asm/pgtable-64.h
> index 7a5097202e15..9a2c780a11e9 100644
> --- a/arch/riscv/include/asm/pgtable-64.h
> +++ b/arch/riscv/include/asm/pgtable-64.h
> @@ -126,14 +126,18 @@ enum napot_cont_order {
>
> /*
> * [63:59] T-Head Memory Type definitions:
> - *
> - * 00000 - NC Weakly-ordered, Non-cacheable, Non-bufferable, Non-shareable, Non-trustable
> + * bit[63] SO - Strong Order
> + * bit[62] C - Cacheable
> + * bit[61] B - Bufferable
> + * bit[60] SH - Shareable
> + * bit[59] Sec - Trustable
> + * 00110 - NC Weakly-ordered, Non-cacheable, Bufferable, Shareable, Non-trustable
> * 01110 - PMA Weakly-ordered, Cacheable, Bufferable, Shareable, Non-trustable
> - * 10000 - IO Strongly-ordered, Non-cacheable, Non-bufferable, Non-shareable, Non-trustable
> + * 10010 - IO Strongly-ordered, Non-cacheable, Non-bufferable, Shareable, Non-trustable
> */
> #define _PAGE_PMA_THEAD ((1UL << 62) | (1UL << 61) | (1UL << 60))
> -#define _PAGE_NOCACHE_THEAD 0UL
> -#define _PAGE_IO_THEAD (1UL << 63)
> +#define _PAGE_NOCACHE_THEAD ((1UL < 61) | (1UL << 60))
> +#define _PAGE_IO_THEAD ((1UL << 63) | (1UL << 60))
> #define _PAGE_MTMASK_THEAD (_PAGE_PMA_THEAD | _PAGE_IO_THEAD | (1UL << 59))
>
> static inline u64 riscv_page_mtmask(void)
> --
> 2.40.1
>
>
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