Re: [PATCH 2/8] phy: qcom: Introduce Super-Speed USB UNIPHY driver

From: Dmitry Baryshkov
Date: Tue Oct 03 2023 - 10:56:00 EST


On Tue, 3 Oct 2023 at 17:22, Praveenkumar I <quic_ipkumar@xxxxxxxxxxx> wrote:
>
>
>
> On 9/30/2023 10:48 PM, Dmitry Baryshkov wrote:
> > On 29/09/2023 11:42, Praveenkumar I wrote:
> >> Adds Qualcomm 22ull Super-Speed USB UNIPHY driver support which
> >> is present in Qualcomm IPQ5332 SoC. This PHY is interfaced with
> >> SNPS DWC3 USB and SNPS DWC PCIe. Either one of the interface
> >> can use the it and selection is done via mux present in TCSR
> >> register. This driver selects the PHY for DWC3 USB and handles
> >> the reset, clocks and regulator.
> >>
> >> Signed-off-by: Praveenkumar I <quic_ipkumar@xxxxxxxxxxx>
> >> ---
> >> drivers/phy/qualcomm/Kconfig | 11 +
> >> drivers/phy/qualcomm/Makefile | 1 +
> >> drivers/phy/qualcomm/phy-qcom-uniphy-usb.c | 322 +++++++++++++++++++++
> >> 3 files changed, 334 insertions(+)
> >> create mode 100644 drivers/phy/qualcomm/phy-qcom-uniphy-usb.c
> >>
> >> diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig
> >> index d891058b7c39..7257c8455c53 100644
> >> --- a/drivers/phy/qualcomm/Kconfig
> >> +++ b/drivers/phy/qualcomm/Kconfig
> >> @@ -154,6 +154,17 @@ config PHY_QCOM_M31_USB
> >> management. This driver is required even for peripheral only or
> >> host only mode configurations.
> >> +config PHY_QCOM_UNIPHY_USB
> >> + tristate "Qualcomm USB Super-Speed UNIPHY driver"
> >
> > Can we please have more specific driver name? As I wrote earlier,
> > there are two other (different) kinds of Qualcomm UNI PHY devices:
> > - DSI / HDMI UNIPHY on apq8064 / msm8974 / msm8960 (?)
> > - USB QMP UNI PHY drivers
> >
> > Adding a driver called UNIPHY, which is not related to those two kinds
> > sounds pretty confusing to me.
> This UNIPHY is different from above mentioned ones. This a custom
> version for 22nm on Qualcomm IPQ5332.
> Can we name the driver as phy-qcom-uniphy-usb-ss-22ull.c /
> phy-qcom-usb-ss-22ull.c ?

usb-ss-22ull sounds better. Or maybe usb-ipq-ss

> >
> >> + depends on USB && (ARCH_QCOM || COMPILE_TEST)
> >> + select GENERIC_PHY
> >> + help
> >> + Enable this to support the Qualcomm USB Super-Speed UNIPHY
> >> transceiver
> >> + with DWC3 USB core. It handles PHY initialization, clock
> >> + management required after resetting the hardware and power
> >> + management. This driver is required even for peripheral only or
> >> + host only mode configurations.
> >> +
> >> config PHY_QCOM_USB_HS
> >> tristate "Qualcomm USB HS PHY module"
> >> depends on USB_ULPI_BUS
> >> diff --git a/drivers/phy/qualcomm/Makefile
> >> b/drivers/phy/qualcomm/Makefile
> >> index ffd609ac6233..c3e0112a7a70 100644
> >> --- a/drivers/phy/qualcomm/Makefile
> >> +++ b/drivers/phy/qualcomm/Makefile
> >> @@ -17,6 +17,7 @@ obj-$(CONFIG_PHY_QCOM_QMP_USB_LEGACY) +=
> >> phy-qcom-qmp-usb-legacy.o
> >> obj-$(CONFIG_PHY_QCOM_QUSB2) += phy-qcom-qusb2.o
> >> obj-$(CONFIG_PHY_QCOM_SNPS_EUSB2) += phy-qcom-snps-eusb2.o
> >> obj-$(CONFIG_PHY_QCOM_EUSB2_REPEATER) += phy-qcom-eusb2-repeater.o
> >> +obj-$(CONFIG_PHY_QCOM_UNIPHY_USB) += phy-qcom-uniphy-usb.o
> >> obj-$(CONFIG_PHY_QCOM_USB_HS) += phy-qcom-usb-hs.o
> >> obj-$(CONFIG_PHY_QCOM_USB_HSIC) += phy-qcom-usb-hsic.o
> >> obj-$(CONFIG_PHY_QCOM_USB_HS_28NM) += phy-qcom-usb-hs-28nm.o
> >> diff --git a/drivers/phy/qualcomm/phy-qcom-uniphy-usb.c
> >> b/drivers/phy/qualcomm/phy-qcom-uniphy-usb.c
> >> new file mode 100644
> >> index 000000000000..fdfc9c225995
> >> --- /dev/null
> >> +++ b/drivers/phy/qualcomm/phy-qcom-uniphy-usb.c
> >
> > So, is it a USB PHY or UNI PHY (where I would expect that it handles
> > USB and PCIe?)
> It is a USB PHY and the PHY name is UNIPHY. Added the usb in the file
> name to differentiate it.
> >

--
With best wishes
Dmitry