Re: [PATCH 2/3] arm64: dts: qcom: sc7280: Add Camera Control Interface busses

From: Bryan O'Donoghue
Date: Fri Sep 29 2023 - 10:15:41 EST


On 29/09/2023 14:35, Konrad Dybcio wrote:


On 9/29/23 10:01, Luca Weiss wrote:
Add the CCI busses found on sc7280 and their pinctrl states.

Signed-off-by: Luca Weiss <luca.weiss@xxxxxxxxxxxxx>
---
  arch/arm64/boot/dts/qcom/sc7280.dtsi | 136 +++++++++++++++++++++++++++++++++++
  1 file changed, 136 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 66f1eb83cca7..65550de2e4ff 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3793,6 +3793,86 @@ videocc: clock-controller@aaf0000 {
              #power-domain-cells = <1>;
          };
+        cci0: cci@ac4a000 {
+            compatible = "qcom,sc7280-cci", "qcom,msm8996-cci";
+            reg = <0 0x0ac4a000 0 0x1000>;
+            interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
+            power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
+
+            clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
+                 <&camcc CAM_CC_SLOW_AHB_CLK_SRC>,
+                 <&camcc CAM_CC_CPAS_AHB_CLK>,
+                 <&camcc CAM_CC_CCI_0_CLK>,
+                 <&camcc CAM_CC_CCI_0_CLK_SRC>;
+            clock-names = "camnoc_axi",
+                      "slow_ahb_src",
+                      "cpas_ahb",
+                      "cci",
+                      "cci_src";
I guess this is more of a question to e.g. Bryan, but are all of these clocks actually necessary?

Konrad
Hmm its a good question, we generally take the approach of adopting all of the downstream clocks for these camera interfaces verbatim.

The clock plan for this part only calls out cci_X_clk and cci_x_clk_src for the CCI however we know that to be incomplete since we *absolutely* need to have the AXI for the block clocked to access those registers, same deal with the AHB bus.

AXI: registers
AHB: data

In the above list the only clock you might conceivably not need is CPAS_AHB_CLK.

Let me zap that clock from sdm845 since I have an rb3 right in front of me and see what happens.

Crash and reset

--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -4402,13 +4402,11 @@ cci: cci@ac4a000 {
clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
<&clock_camcc CAM_CC_SOC_AHB_CLK>,
<&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
- <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
<&clock_camcc CAM_CC_CCI_CLK>,
<&clock_camcc CAM_CC_CCI_CLK_SRC>;
clock-names = "camnoc_axi",
"soc_ahb",
"slow_ahb_src",
- "cpas_ahb",
"cci",
"cci_src";


I think the list is good tbh

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx>