Re: [PATCH 5/5] riscv: configs: defconfig: Enable configs required for RZ/Five SoC

From: Conor Dooley
Date: Fri Sep 29 2023 - 10:15:06 EST


On Fri, Sep 29, 2023 at 01:07:04AM +0100, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Enable the configs required by the below IP blocks which are
> present on RZ/Five SoC:
> * ADC
> * CANFD
> * DMAC
> * eMMC/SDHI
> * OSTM
> * RAVB (+ Micrel PHY)
> * RIIC
> * RSPI
> * SSI (Sound+WM8978 codec)
> * Thermal
> * USB (PHY/RESET/OTG)
>
> Along with the above some core configs are enabled too,
> -> CPU frequency scaling as RZ/Five does support this.
> -> MTD is enabled as RSPI can be connected to flash chips
> -> Enabled I2C chardev so that it enables userspace to read/write
> i2c devices (similar to arm64)
> -> Thermal configs as RZ/Five SoC does have thermal unit
> -> GPIO regulator as we might have IP blocks for which voltage
> levels are controlled by GPIOs

You might or you do?

Either way, this stuff seems fine to me /shrug

Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>

Thanks,
Conor.

> -> OTG configs as RZ/Five USB can support host/function
> -> Gadget configs so that we can test USB function (as done in arm64
> all the gadget configs are enabled)
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> ---
> arch/riscv/configs/defconfig | 52 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 52 insertions(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index ab86ec3b9eab..1e81c865a271 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -36,6 +36,13 @@ CONFIG_SMP=y
> CONFIG_HOTPLUG_CPU=y
> CONFIG_PM=y
> CONFIG_CPU_IDLE=y
> +CONFIG_CPU_FREQ=y
> +CONFIG_CPU_FREQ_STAT=y
> +CONFIG_CPU_FREQ_GOV_POWERSAVE=m
> +CONFIG_CPU_FREQ_GOV_USERSPACE=y
> +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
> +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
> +CONFIG_CPUFREQ_DT=y
> CONFIG_VIRTUALIZATION=y
> CONFIG_KVM=m
> CONFIG_ACPI=y
> @@ -94,6 +101,7 @@ CONFIG_NETLINK_DIAG=y
> CONFIG_CGROUP_NET_PRIO=y
> CONFIG_NET_9P=y
> CONFIG_NET_9P_VIRTIO=y
> +CONFIG_CAN=m
> CONFIG_PCI=y
> CONFIG_PCIEPORTBUS=y
> CONFIG_PCI_HOST_GENERIC=y
> @@ -101,6 +109,11 @@ CONFIG_PCIE_XILINX=y
> CONFIG_PCIE_FU740=y
> CONFIG_DEVTMPFS=y
> CONFIG_DEVTMPFS_MOUNT=y
> +CONFIG_MTD=y
> +CONFIG_MTD_BLOCK=y
> +CONFIG_MTD_CFI=y
> +CONFIG_MTD_CFI_ADV_OPTIONS=y
> +CONFIG_MTD_SPI_NOR=y
> CONFIG_BLK_DEV_LOOP=y
> CONFIG_VIRTIO_BLK=y
> CONFIG_BLK_DEV_NVME=m
> @@ -123,8 +136,11 @@ CONFIG_VIRTIO_NET=y
> CONFIG_MACB=y
> CONFIG_E1000E=y
> CONFIG_R8169=y
> +CONFIG_RAVB=y
> CONFIG_STMMAC_ETH=m
> +CONFIG_MICREL_PHY=y
> CONFIG_MICROSEMI_PHY=y
> +CONFIG_CAN_RCAR_CANFD=m
> CONFIG_INPUT_MOUSEDEV=y
> CONFIG_KEYBOARD_SUN4I_LRADC=m
> CONFIG_SERIAL_8250=y
> @@ -135,16 +151,24 @@ CONFIG_SERIAL_SH_SCI=y
> CONFIG_VIRTIO_CONSOLE=y
> CONFIG_HW_RANDOM=y
> CONFIG_HW_RANDOM_VIRTIO=y
> +CONFIG_I2C_CHARDEV=m
> CONFIG_I2C_MV64XXX=m
> +CONFIG_I2C_RIIC=y
> CONFIG_SPI=y
> +CONFIG_SPI_RSPI=m
> CONFIG_SPI_SIFIVE=y
> CONFIG_SPI_SUN6I=y
> # CONFIG_PTP_1588_CLOCK is not set
> CONFIG_GPIO_SIFIVE=y
> +CONFIG_CPU_THERMAL=y
> +CONFIG_DEVFREQ_THERMAL=y
> +CONFIG_RZG2L_THERMAL=y
> CONFIG_WATCHDOG=y
> CONFIG_SUNXI_WATCHDOG=y
> +CONFIG_RENESAS_RZG2LWDT=y
> CONFIG_REGULATOR=y
> CONFIG_REGULATOR_FIXED_VOLTAGE=y
> +CONFIG_REGULATOR_GPIO=y
> CONFIG_DRM=m
> CONFIG_DRM_RADEON=m
> CONFIG_DRM_NOUVEAU=m
> @@ -152,39 +176,67 @@ CONFIG_DRM_SUN4I=m
> CONFIG_DRM_VIRTIO_GPU=m
> CONFIG_FB=y
> CONFIG_FRAMEBUFFER_CONSOLE=y
> +CONFIG_SOUND=y
> +CONFIG_SND=y
> +CONFIG_SND_SOC=y
> +CONFIG_SND_SOC_RZ=m
> +CONFIG_SND_SOC_WM8978=m
> +CONFIG_SND_SIMPLE_CARD=m
> CONFIG_USB=y
> +CONFIG_USB_OTG=y
> CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_PLATFORM=y
> CONFIG_USB_EHCI_HCD=y
> CONFIG_USB_EHCI_HCD_PLATFORM=y
> CONFIG_USB_OHCI_HCD=y
> CONFIG_USB_OHCI_HCD_PLATFORM=y
> +CONFIG_USB_RENESAS_USBHS=m
> CONFIG_USB_STORAGE=y
> CONFIG_USB_UAS=y
> CONFIG_USB_MUSB_HDRC=m
> CONFIG_USB_MUSB_SUNXI=m
> CONFIG_NOP_USB_XCEIV=m
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_RENESAS_USBHS_UDC=m
> +CONFIG_USB_CONFIGFS=m
> +CONFIG_USB_CONFIGFS_SERIAL=y
> +CONFIG_USB_CONFIGFS_ACM=y
> +CONFIG_USB_CONFIGFS_OBEX=y
> +CONFIG_USB_CONFIGFS_NCM=y
> +CONFIG_USB_CONFIGFS_ECM=y
> +CONFIG_USB_CONFIGFS_ECM_SUBSET=y
> +CONFIG_USB_CONFIGFS_RNDIS=y
> +CONFIG_USB_CONFIGFS_EEM=y
> +CONFIG_USB_CONFIGFS_MASS_STORAGE=y
> +CONFIG_USB_CONFIGFS_F_FS=y
> CONFIG_MMC=y
> CONFIG_MMC_SDHCI=y
> CONFIG_MMC_SDHCI_PLTFM=y
> CONFIG_MMC_SDHCI_CADENCE=y
> CONFIG_MMC_SPI=y
> +CONFIG_MMC_SDHI=y
> CONFIG_MMC_SUNXI=y
> CONFIG_RTC_CLASS=y
> CONFIG_RTC_DRV_SUN6I=y
> CONFIG_DMADEVICES=y
> CONFIG_DMA_SUN6I=m
> +CONFIG_RZ_DMAC=y
> CONFIG_VIRTIO_PCI=y
> CONFIG_VIRTIO_BALLOON=y
> CONFIG_VIRTIO_INPUT=y
> CONFIG_VIRTIO_MMIO=y
> +CONFIG_RENESAS_OSTM=y
> CONFIG_SUN8I_DE2_CCU=m
> CONFIG_SUN50I_IOMMU=y
> CONFIG_RPMSG_CHAR=y
> CONFIG_RPMSG_CTRL=y
> CONFIG_RPMSG_VIRTIO=y
> CONFIG_ARCH_R9A07G043=y
> +CONFIG_IIO=y
> +CONFIG_RZG2L_ADC=m
> +CONFIG_RESET_RZG2L_USBPHY_CTRL=y
> CONFIG_PHY_SUN4I_USB=m
> +CONFIG_PHY_RCAR_GEN3_USB2=y
> CONFIG_LIBNVDIMM=y
> CONFIG_NVMEM_SUNXI_SID=y
> CONFIG_EXT4_FS=y
> --
> 2.34.1
>

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