Re: [PATCH] net: ethernet: ti: am65-cpsw: add sw tx/rx irq coalescing based on hrtimers

[Simon Horman]

On Fri, Sep 22, 2023 at 03:19:47PM +0300, Roger Quadros wrote:
> From: Grygorii Strashko <grygorii.strashko@xxxxxx>
> 
> Add SW IRQ coalescing based on hrtimers for TX and RX data path which
> can be enabled by ethtool commands:
> 
> - RX coalescing
>   ethtool -C eth1 rx-usecs 50
> 
> - TX coalescing can be enabled per TX queue
> 
>   - by default enables coalesing for TX0
>   ethtool -C eth1 tx-usecs 50
>   - configure TX0
>   ethtool -Q eth0 queue_mask 1 --coalesce tx-usecs 100
>   - configure TX1
>   ethtool -Q eth0 queue_mask 2 --coalesce tx-usecs 100
>   - configure TX0 and TX1
>   ethtool -Q eth0 queue_mask 3 --coalesce tx-usecs 100 --coalesce tx-usecs 100
> 
>   show configuration for TX0 and TX1:
>   ethtool -Q eth0 queue_mask 3 --show-coalesce
> 
> Comparing to gro_flush_timeout and napi_defer_hard_irqs, this patch
> allows to enable IRQ coalesing for RX path separately.
> 
> Signed-off-by: Grygorii Strashko <grygorii.strashko@xxxxxx>
> Signed-off-by: Roger Quadros <rogerq@xxxxxxxxxx>

Reviewed-by: Simon Horman <horms@xxxxxxxxxx>