Re: [PATCH v2 1/4] x86/resctrl: Enable non-contiguous bits in Intel CAT
From: Tony Luck
Date: Wed Sep 27 2023 - 11:03:39 EST
On Wed, Sep 27, 2023 at 12:44:39PM +0200, Maciej Wieczór-Retman wrote:
> Writing non-contiguous bitmasks is supported starting from the upcoming
> GNR microarchitecture forward.
>
> That's also why the new CPUID bit meaning is in the ISA pdf and not in
> the SDM one currently.
New SDM released today has the non-contiguous bit. See vol 3B Figuer
18-33.
-Tony