[PATCH v6 02/11] dt-bindings: arm: fsl: add imx-se-fw binding doc

From: Pankaj Gupta
Date: Wed Sep 27 2023 - 08:26:52 EST


The NXP's i.MX EdgeLock Enclave, a HW IP creating an embedded
secure enclave within the SoC boundary to enable features like
- HSM
- SHE
- V2X

Communicates via message unit with linux kernel. This driver
is enables communication ensuring well defined message sequence
protocol between Application Core and enclave's firmware.

Driver configures multiple misc-device on the MU, for multiple
user-space applications can communicate on single MU.

It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc.

Signed-off-by: Pankaj Gupta <pankaj.gupta@xxxxxxx>
---
.../bindings/firmware/fsl,imx-se-fw.yaml | 73 +++++++++++++++++++
1 file changed, 73 insertions(+)
create mode 100644 Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml

diff --git a/Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml b/Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml
new file mode 100644
index 000000000000..d250794432b3
--- /dev/null
+++ b/Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/firmware/fsl,imx-se-fw.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX EdgeLock Enclave Firmware (ELEFW)
+
+maintainers:
+ - Pankaj Gupta <pankaj.gupta@xxxxxxx>
+
+description:
+ The NXP's i.MX EdgeLock Enclave, a HW IP creating an embedded
+ secure enclave within the SoC boundary to enable features like
+ - HSM
+ - SHE
+ - V2X
+
+ It uses message unit to communicate and coordinate to pass messages
+ (e.g., data, status and control) through its interfaces.
+
+properties:
+ compatible:
+ enum:
+ - fsl,imx8ulp-se-fw
+ - fsl,imx93-se-fw
+
+ mboxes:
+ description:
+ All MU channels must be within the same MU instance. Cross instances are
+ not allowed. Users need to ensure that used MU instance does not conflict
+ with other execution environments.
+ items:
+ - description: TX0 MU channel
+ - description: RX0 MU channel
+
+ mbox-names:
+ items:
+ - const: tx
+ - const: rx
+
+ fsl,mu-id:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Identifier to the message-unit among the multiple message-unit that exists on SoC.
+ Per message-unit, multiple misc-devices are created, that are used by userspace
+ application as logical-waiter and logical-receiver.
+
+ memory-region:
+ items:
+ - description: Reserved memory region that can be accessed by firmware. Used for
+ exchanging the buffers between driver and firmware.
+
+ fsl,sram:
+ description: Phandle to the device SRAM
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+
+required:
+ - compatible
+ - mboxes
+ - mbox-names
+ - fsl,mu-id
+
+additionalProperties: false
+
+examples:
+ - |
+ ele_fw: se-fw {
+ compatible = "fsl,imx8ulp-se-fw";
+ mbox-names = "tx", "rx";
+ mboxes = <&s4muap 0 0>, <&s4muap 1 0>;
+ fsl,mu-id = <2>;
+ };
--
2.34.1