Re: [PATCH v5 4/7] arm64: dts: ti: k3-j784s4-main: Add the main domain watchdog instances

From: Nishanth Menon
Date: Tue Sep 26 2023 - 13:12:31 EST

On 18:58-20230926, Keerthy wrote:
> There are totally 19 instances of watchdog module. One each for the
> 8 A72 cores, one each for the 4 C7x cores, 1 for the GPU, 1 each
> for the 6 R5F cores in the main domain. Keeping only the A72 instances
> enabled and disabling the rest by default.
>
> Signed-off-by: Keerthy <j-keerthy@xxxxxx>
> ---
> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 182 +++++++++++++++++++++
> 1 file changed, 182 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> index 26dc3776f911..8c3efe066803 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> @@ -1576,4 +1576,186 @@
> <695>;
> bootph-pre-ram;
> };
> +
> + watchdog0: watchdog@2200000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2200000 0x00 0x100>;
> + clocks = <&k3_clks 348 1>;
> + power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 348 0>;
> + assigned-clock-parents = <&k3_clks 348 4>;
> + };
> +
> + watchdog1: watchdog@2210000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2210000 0x00 0x100>;
> + clocks = <&k3_clks 349 1>;
> + power-domains = <&k3_pds 349 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 349 0>;
> + assigned-clock-parents = <&k3_clks 349 4>;
> + };
> +
> + watchdog2: watchdog@2220000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2220000 0x00 0x100>;
> + clocks = <&k3_clks 350 1>;
> + power-domains = <&k3_pds 350 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 350 0>;
> + assigned-clock-parents = <&k3_clks 350 4>;
> + };
> +
> + watchdog3: watchdog@2230000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2230000 0x00 0x100>;
> + clocks = <&k3_clks 351 1>;
> + power-domains = <&k3_pds 351 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 351 0>;
> + assigned-clock-parents = <&k3_clks 351 4>;
> + };
> +
> + watchdog4: watchdog@2240000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2240000 0x00 0x100>;
> + clocks = <&k3_clks 352 1>;
> + power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 352 0>;
> + assigned-clock-parents = <&k3_clks 352 4>;
> + };
> +
> + watchdog5: watchdog@2250000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2250000 0x00 0x100>;
> + clocks = <&k3_clks 353 1>;
> + power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 353 0>;
> + assigned-clock-parents = <&k3_clks 353 4>;
> + };
> +
> + watchdog6: watchdog@2260000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2260000 0x00 0x100>;
> + clocks = <&k3_clks 354 1>;
> + power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 354 0>;
> + assigned-clock-parents = <&k3_clks 354 4>;
> + };
> +
> + watchdog7: watchdog@2270000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2270000 0x00 0x100>;
> + clocks = <&k3_clks 355 1>;
> + power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 355 0>;
> + assigned-clock-parents = <&k3_clks 355 4>;
> + };
> +
> + watchdog16: watchdog@2300000 {
> + status = "disabled";

wow.. lots of watchdogs.. but you seem to have missed the document why
disabled comment here AND missed the comment about using status
as the last property.
https://lore.kernel.org/all/5187c590-ee9a-4c46-b326-655f4c371aaf@xxxxxxxxxx/

> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2300000 0x00 0x100>;
> + clocks = <&k3_clks 356 1>;
> + power-domains = <&k3_pds 356 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 356 0>;
> + assigned-clock-parents = <&k3_clks 356 4>;
> + };
> +
> + watchdog17: watchdog@2310000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2310000 0x00 0x100>;
> + clocks = <&k3_clks 357 1>;
> + power-domains = <&k3_pds 357 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 357 0>;
> + assigned-clock-parents = <&k3_clks 357 4>;
> + };
> +
> + watchdog18: watchdog@2320000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2320000 0x00 0x100>;
> + clocks = <&k3_clks 358 1>;
> + power-domains = <&k3_pds 358 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 358 0>;
> + assigned-clock-parents = <&k3_clks 358 4>;
> + };
> +
> + watchdog19: watchdog@2330000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2330000 0x00 0x100>;
> + clocks = <&k3_clks 359 1>;
> + power-domains = <&k3_pds 359 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 359 0>;
> + assigned-clock-parents = <&k3_clks 359 4>;
> + };
> +
> + watchdog15: watchdog@22f0000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x22f0000 0x00 0x100>;
> + clocks = <&k3_clks 360 1>;
> + power-domains = <&k3_pds 360 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 360 0>;
> + assigned-clock-parents = <&k3_clks 360 4>;
> + };
> +
> + watchdog28: watchdog@23c0000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23c0000 0x00 0x100>;
> + clocks = <&k3_clks 361 1>;
> + power-domains = <&k3_pds 361 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 361 0>;
> + assigned-clock-parents = <&k3_clks 361 4>;
> + };
> +
> + watchdog29: watchdog@23d0000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23d0000 0x00 0x100>;
> + clocks = <&k3_clks 362 1>;
> + power-domains = <&k3_pds 362 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 362 0>;
> + assigned-clock-parents = <&k3_clks 362 4>;
> + };
> +
> + watchdog30: watchdog@23e0000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23e0000 0x00 0x100>;
> + clocks = <&k3_clks 363 1>;
> + power-domains = <&k3_pds 363 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 363 0>;
> + assigned-clock-parents = <&k3_clks 363 4>;
> + };
> +
> + watchdog31: watchdog@23f0000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23f0000 0x00 0x100>;
> + clocks = <&k3_clks 364 1>;
> + power-domains = <&k3_pds 364 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 364 0>;
> + assigned-clock-parents = <&k3_clks 364 4>;
> + };
> +
> + watchdog32: watchdog@2540000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2540000 0x00 0x100>;
> + clocks = <&k3_clks 365 1>;
> + power-domains = <&k3_pds 365 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 365 0>;
> + assigned-clock-parents = <&k3_clks 366 4>;
> + };
> +
> + watchdog33: watchdog@2550000 {
> + status = "disabled";
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2550000 0x00 0x100>;
> + clocks = <&k3_clks 366 1>;
> + power-domains = <&k3_pds 366 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 366 0>;
> + assigned-clock-parents = <&k3_clks 366 4>;
> + };
> };
> --
> 2.17.1
>

--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D