Re: [PATCH] perf/arm-cmn: Fix the unhandled overflow status of counter 4 to 7

[Robin Murphy]

On 2023-09-25 04:22, Jing Zhang wrote:
> The register por_dt_pmovsr Bits[7:0] indicates overflow from counters 7
> to 0. But in arm_cmn_handle_irq(), only handled the overflow status of
> Bits[3:0] which results in unhandled overflow status of counters 4 to 7.
>
> So let the overflow status of DTC counters 4 to 7 to be handled.

Oh dear goodness, how has such a stupid typo managed to exist for 4 
years? Truly this is a brown paper bag moment... :(

Reviewed-by: Robin Murphy <robin.murphy@xxxxxxx>

> Fixes: 0ba64770a2f2 ("perf: Add Arm CMN-600 PMU driver")
> Signed-off-by: Jing Zhang <renyu.zj@xxxxxxxxxxxxxxxxx>
> ---
>   drivers/perf/arm-cmn.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/perf/arm-cmn.c b/drivers/perf/arm-cmn.c
> index 913dc04..6b50bc5 100644
> --- a/drivers/perf/arm-cmn.c
> +++ b/drivers/perf/arm-cmn.c
> @@ -1972,7 +1972,7 @@ static irqreturn_t arm_cmn_handle_irq(int irq, void *dev_id)
>   		u64 delta;
>   		int i;
>   
> -		for (i = 0; i < CMN_DTM_NUM_COUNTERS; i++) {
> +		for (i = 0; i < CMN_DT_NUM_COUNTERS; i++) {
>   			if (status & (1U << i)) {
>   				ret = IRQ_HANDLED;
>   				if (WARN_ON(!dtc->counters[i]))