RE: [RFC PATCH 0/9] ACPI:RASF: Add support for ACPI RASF, ACPI RAS2 and configure scrubbers

From: Shiju Jose
Date: Tue Sep 19 2023 - 04:28:32 EST


>-----Original Message-----
>From: Jiaqi Yan <jiaqiyan@xxxxxxxxxx>
>Sent: 18 September 2023 18:47
>To: Shiju Jose <shiju.jose@xxxxxxxxxx>
>Cc: linux-acpi@xxxxxxxxxxxxxxx; linux-mm@xxxxxxxxx; linux-
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><linuxarm@xxxxxxxxxx>; Jonathan Cameron
><jonathan.cameron@xxxxxxxxxx>; tanxiaofei <tanxiaofei@xxxxxxxxxx>;
>Zengtao (B) <prime.zeng@xxxxxxxxxxxxx>; bp@xxxxxxxxx; mchehab@xxxxxxxxxx;
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>Subject: Re: [RFC PATCH 0/9] ACPI:RASF: Add support for ACPI RASF, ACPI RAS2
>and configure scrubbers
>
>On Mon, Sep 18, 2023 at 3:20 AM Shiju Jose <shiju.jose@xxxxxxxxxx> wrote:
>>
>> [+cc linux-edac@xxxxxxxxxxxxxxx]
>>
>> Hello,
>>
>> >-----Original Message-----
>> >From: Jiaqi Yan <jiaqiyan@xxxxxxxxxx>
>> >Sent: 17 September 2023 22:14
>> >To: Shiju Jose <shiju.jose@xxxxxxxxxx>
>> >Cc: linux-acpi@xxxxxxxxxxxxxxx; linux-mm@xxxxxxxxx; linux-
>> >kernel@xxxxxxxxxxxxxxx; rafael@xxxxxxxxxx; lenb@xxxxxxxxxx;
>> >naoya.horiguchi@xxxxxxx; tony.luck@xxxxxxxxx; james.morse@xxxxxxx;
>> >dave.hansen@xxxxxxxxxxxxxxx; david@xxxxxxxxxx; jthoughton@xxxxxxxxxx;
>> >somasundaram.a@xxxxxxx; erdemaktas@xxxxxxxxxx;
>pgonda@xxxxxxxxxx;
>> >rientjes@xxxxxxxxxx; duenwen@xxxxxxxxxx; Vilas.Sridharan@xxxxxxx;
>> >mike.malvestuto@xxxxxxxxx; gthelen@xxxxxxxxxx; Linuxarm
>> ><linuxarm@xxxxxxxxxx>; Jonathan Cameron
>> ><jonathan.cameron@xxxxxxxxxx>; tanxiaofei <tanxiaofei@xxxxxxxxxx>;
>> >Zengtao (B) <prime.zeng@xxxxxxxxxxxxx>
>> >Subject: Re: [RFC PATCH 0/9] ACPI:RASF: Add support for ACPI RASF,
>> >ACPI RAS2 and configure scrubbers
>> >
>> >On Fri, Sep 15, 2023 at 10:29 AM <shiju.jose@xxxxxxxxxx> wrote:
>> >>
>> >> From: Shiju Jose <shiju.jose@xxxxxxxxxx>
>> >>
>> >> This series add,
>> >> 1. support for ACPI RASF(RAS feature table) PCC interfaces to
>> >> communicate with the HW patrol scrubber in the platform, as per
>> >> ACPI
>> >> 5.1 & upwards revision. Section 5.2.20.
>> >>
>> >> 2. support for ACPI RAS2(RAS2 feature table), as per ACPI 6.5 &
>> >> upwards revision. Section 5.2.21.
>> >>
>> >> 3. scrub driver supports configuring parameters of the memory
>> >> scrubbers in the system. This driver has been implemented based on
>> >> the hwmon subsystem.
>> >>
>> >> The features have tested with RASF and RAS2 emulation in the QEMU.
>> >
>> >I am very curious how the test is done. Does the hw patrol scrubber
>> >on host actually been driven by the driver to scrub memory DIMMs
>> >(doesn't seem so to me, but do correct me)? Or it is like to a VM
>> >scrubbing is simulated and no real op to DIMMs?
>> Intent here is hardware scrubber on host as far as we are concerned.
>
>Sorry maybe my question was not clear, so let me try again.
>
>Does the driver being tested on a machine and directly or indirectly control
>(start/stop) hardware patrol scrubber to scrub physical memory? what are the
>CPU chip, memory controller, and DIMM chips?
The driver has been tested with qemu_system_aarch64 with state machine to emulate
the RASF and RAS2 tables support for configuring parameters of a patrol scrubber.
Thus no real HW patrol scrubber and DIMM involved in the testing.

>
>> Could be used for VM too perhaps. We did it with QEMU emulation for
>> now to get the flexibility of configuration. However there will be
>> other scrub controls over time, such as DDR5 ECS.
>> https://media-www.micron.com/-/media/client/global/documents/products/
>> white-
>paper/ddr5_new_features_white_paper.pdf?rev=b98f4977d9334b4aa5d0
>> d211a92bf14a
>>
>> Also found there is very simple support for scrub control in edac, and

Thanks,
Shiju