Re: [PATCH RFC v2 15/18] cxl/mem: Trace Dynamic capacity Event Record

From: Jonathan Cameron
Date: Tue Aug 29 2023 - 12:47:20 EST


On Mon, 28 Aug 2023 22:21:06 -0700
ira.weiny@xxxxxxxxx wrote:

> From: Navneet Singh <navneet.singh@xxxxxxxxx>
>
> CXL rev 3.0 section 8.2.9.2.1.5 defines the Dynamic Capacity Event Record
> Determine if the event read is a Dynamic capacity event record and
> if so trace the record for the debug purpose.
>
> Add DC trace points to the trace log.

Probably should say why these might be useful...


>
> Signed-off-by: Navneet Singh <navneet.singh@xxxxxxxxx>
> Signed-off-by: Ira Weiny <ira.weiny@xxxxxxxxx>
>
> ---
> [iweiny: fixups]
> ---
> drivers/cxl/core/mbox.c | 5 ++++
> drivers/cxl/core/trace.h | 65 ++++++++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 70 insertions(+)
>
> diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c
> index 9d9c13e13ecf..9462c34aa1dc 100644
> --- a/drivers/cxl/core/mbox.c
> +++ b/drivers/cxl/core/mbox.c
> @@ -939,6 +939,11 @@ static void cxl_event_trace_record(const struct cxl_memdev *cxlmd,
> (struct cxl_event_mem_module *)record;
>
> trace_cxl_memory_module(cxlmd, type, rec);
> + } else if (uuid_equal(id, &dc_event_uuid)) {
> + struct dcd_event_dyn_cap *rec =
> + (struct dcd_event_dyn_cap *)record;
> +
> + trace_cxl_dynamic_capacity(cxlmd, type, rec);
> } else {
> /* For unknown record types print just the header */
> trace_cxl_generic_event(cxlmd, type, record);
> diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
> index a0b5819bc70b..1899c5cc96b9 100644
> --- a/drivers/cxl/core/trace.h
> +++ b/drivers/cxl/core/trace.h
> @@ -703,6 +703,71 @@ TRACE_EVENT(cxl_poison,
> )
> );
>
> +/*
> + * DYNAMIC CAPACITY Event Record - DER
> + *
> + * CXL rev 3.0 section 8.2.9.2.1.5 Table 8-47
> + */
> +
> +#define CXL_DC_ADD_CAPACITY 0x00
> +#define CXL_DC_REL_CAPACITY 0x01
> +#define CXL_DC_FORCED_REL_CAPACITY 0x02
> +#define CXL_DC_REG_CONF_UPDATED 0x03
> +#define show_dc_evt_type(type) __print_symbolic(type, \
> + { CXL_DC_ADD_CAPACITY, "Add capacity"}, \
> + { CXL_DC_REL_CAPACITY, "Release capacity"}, \
> + { CXL_DC_FORCED_REL_CAPACITY, "Forced capacity release"}, \
> + { CXL_DC_REG_CONF_UPDATED, "Region Configuration Updated" } \
> +)
> +
> +TRACE_EVENT(cxl_dynamic_capacity,
> +
> + TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log,
> + struct dcd_event_dyn_cap *rec),
> +
> + TP_ARGS(cxlmd, log, rec),
> +
> + TP_STRUCT__entry(
> + CXL_EVT_TP_entry
> +
> + /* Dynamic capacity Event */
> + __field(u8, event_type)
> + __field(u16, hostid)
> + __field(u8, region_id)
> + __field(u64, dpa_start)
> + __field(u64, length)
> + __array(u8, tag, CXL_DC_EXTENT_TAG_LEN)
> + __field(u16, sh_extent_seq)
> + ),
> +
> + TP_fast_assign(
> + CXL_EVT_TP_fast_assign(cxlmd, log, rec->hdr);
> +
> + /* Dynamic_capacity Event */
> + __entry->event_type = rec->data.event_type;
> +
> + /* DCD event record data */
> + __entry->hostid = le16_to_cpu(rec->data.host_id);
> + __entry->region_id = rec->data.region_index;
> + __entry->dpa_start = le64_to_cpu(rec->data.extent.start_dpa);
> + __entry->length = le64_to_cpu(rec->data.extent.length);
> + memcpy(__entry->tag, &rec->data.extent.tag, CXL_DC_EXTENT_TAG_LEN);
> + __entry->sh_extent_seq = le16_to_cpu(rec->data.extent.shared_extn_seq);
> + ),
> +
> + CXL_EVT_TP_printk("event_type='%s' host_id='%d' region_id='%d' " \
> + "starting_dpa=%llx length=%llx tag=%s " \
> + "shared_extent_sequence=%d",
> + show_dc_evt_type(__entry->event_type),
> + __entry->hostid,
> + __entry->region_id,
> + __entry->dpa_start,
> + __entry->length,
> + __print_hex(__entry->tag, CXL_DC_EXTENT_TAG_LEN),
> + __entry->sh_extent_seq
> + )
> +);
> +
> #endif /* _CXL_EVENTS_H */
>
> #define TRACE_INCLUDE_FILE trace
>